two_delays.stx

来自「Self timed pipelined adder」· STX 代码 · 共 26 行

Release 8.1i - xst I.24
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to ./xst/projnav.tmp
CPU : 0.00 / 2.43 s | Elapsed : 0.00 / 2.00 s
 
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=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "C:/Documents and Settings/People/Desktop/VLSIASS2/Delay_Element.vhd" in Library work.
Entity <delay_element> compiled.
Entity <delay_element> (Architecture <behavioral>) compiled.
Compiling vhdl file "C:/Documents and Settings/People/Desktop/VLSIASS2/Two_Delays.vhd" in Library work.
Entity <Two_Delays> compiled.
Entity <Two_Delays> (Architecture <Behavioral>) compiled.
CPU : 0.74 / 3.18 s | Elapsed : 1.00 / 3.00 s
 
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Total memory usage is 85600 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings :    0 (   0 filtered)
Number of infos    :    0 (   0 filtered)