djdplj_top.map.summary

来自「用QUARTUS编译通过的等精度频率计」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Failed - Sun May 20 17:10:17 2007
Quartus II Version : 7.0 Build 33 02/05/2007 SJ Full Version
Revision Name : djdplj_top
Top-level Entity Name : djdplj_top
Family : Stratix
Total logic elements : N/A until Partition Merge
Total pins : N/A until Partition Merge
Total virtual pins : N/A until Partition Merge
Total memory bits : N/A until Partition Merge
DSP block 9-bit elements : N/A until Partition Merge
Total PLLs : N/A until Partition Merge
Total DLLs : N/A until Partition Merge