zhutaiji.map.qmsg

能够检测各种状态

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed May 23 12:32:42 2007 " "Info: Processing started: Wed May 23 12:32:42 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off 8 -c zhutaiji " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off 8 -c zhutaiji" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "zhutaiji.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file zhutaiji.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 zhutaiji-behav " "Info: Found design unit 1: zhutaiji-behav" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 zhutaiji " "Info: Found entity 1: zhutaiji" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "zhutaiji " "Info: Elaborating entity \"zhutaiji\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|zhutaiji\|present_state 8 " "Info: State machine \"\|zhutaiji\|present_state\" contains 8 states" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 11 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|zhutaiji\|present_state " "Info: Selected Auto state machine encoding method for state machine \"\|zhutaiji\|present_state\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 11 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|zhutaiji\|present_state " "Info: Encoding result for state machine \"\|zhutaiji\|present_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "8 " "Info: Completed encoding using 8 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "present_state.s8 " "Info: Encoded state bit \"present_state.s8\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "present_state.s7 " "Info: Encoded state bit \"present_state.s7\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "present_state.s6 " "Info: Encoded state bit \"present_state.s6\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "present_state.s5 " "Info: Encoded state bit \"present_state.s5\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "present_state.s4 " "Info: Encoded state bit \"present_state.s4\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "present_state.s3 " "Info: Encoded state bit \"present_state.s3\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "present_state.s2 " "Info: Encoded state bit \"present_state.s2\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "present_state.s1 " "Info: Encoded state bit \"present_state.s1\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|zhutaiji\|present_state.s1 00000000 " "Info: State \"\|zhutaiji\|present_state.s1\" uses code string \"00000000\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|zhutaiji\|present_state.s2 00000011 " "Info: State \"\|zhutaiji\|present_state.s2\" uses code string \"00000011\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|zhutaiji\|present_state.s3 00000101 " "Info: State \"\|zhutaiji\|present_state.s3\" uses code string \"00000101\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|zhutaiji\|present_state.s4 00001001 " "Info: State \"\|zhutaiji\|present_state.s4\" uses code string \"00001001\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|zhutaiji\|present_state.s5 00010001 " "Info: State \"\|zhutaiji\|present_state.s5\" uses code string \"00010001\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|zhutaiji\|present_state.s6 00100001 " "Info: State \"\|zhutaiji\|present_state.s6\" uses code string \"00100001\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|zhutaiji\|present_state.s7 01000001 " "Info: State \"\|zhutaiji\|present_state.s7\" uses code string \"01000001\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|zhutaiji\|present_state.s8 10000001 " "Info: State \"\|zhutaiji\|present_state.s8\" uses code string \"10000001\"" {  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 15 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "zhutaiji.vhd" "" { Text "F:/VHDL2/project/8/zhutaiji.vhd" 11 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "12 " "Info: Implemented 12 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "1 " "Info: Implemented 1 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "8 " "Info: Implemented 8 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed May 23 12:32:53 2007 " "Info: Processing ended: Wed May 23 12:32:53 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Info: Elapsed time: 00:00:12" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}