readme.txt

关于8086的软核fpga代码

CPU86 - Free VHDL CPU8088 IP core                                             
Copyright (C) 2005-2006 HT-LAB 

Quick run: Open a DOSBox/Cygwin shell and navigate to the web_cpu88/Modelsim directory. Execute 
createlib.bat, compile.bat followed by sim.bat. See website for more details. 

The CPU86 core is released under the Aladdin Free Public License (prohibited for commercial applications 
without approval from ht-lab.com), the remaining files are released under the GNU GPL license.

See copying.txt for the full GNU license and cpu86_license.txt for the cpu86 core. 
                                                                                                                                                                     
bugs : [e-mail]                                        
Web  : http://www.ht-lab.com 

Version 0.69, Fixed INTR logic and SHL instruction as reported by Rick Kilgore
Version 0.69, Added INTA/RDN fix from Rick Kilgore
Version 0.68, Fixed INTA vector. The vector is read during the second interrupt acknowledge cycle, in version 0.67
the vector was always 0. 

Good Luck,
Hans.