📄 ft_top.map.qmsg
字号:
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 15 22:04:06 2007 " "Info: Processing started: Tue May 15 22:04:06 2007" { } { } 0} } { } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ft_top -c ft_top " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ft_top -c ft_top" { } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ft_top.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ft_top.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 ft_top " "Info: Found entity 1: ft_top" { } { { "ft_top.bdf" "" { Schematic "E:/ft_top/ft_top.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "ft_top " "Info: Elaborating entity \"ft_top\" for the top level hierarchy" { } { } 0}
{ "Info" "ISGN_SEARCH_FILE" "conter8.bdf 1 1 " "Info: Using design file conter8.bdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 conter8 " "Info: Found entity 1: conter8" { } { { "conter8.bdf" "" { Schematic "E:/ft_top/conter8.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "conter8 conter8:13 " "Info: Elaborating entity \"conter8\" for hierarchy \"conter8:13\"" { } { { "ft_top.bdf" "13" { Schematic "E:/ft_top/ft_top.bdf" { { 328 392 504 424 "13" "" } } } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/others/maxplus2/74390.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/others/maxplus2/74390.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74390 " "Info: Found entity 1: 74390" { } { { "74390.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74390.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74390 conter8:13\|74390:1 " "Info: Elaborating entity \"74390\" for hierarchy \"conter8:13\|74390:1\"" { } { { "conter8.bdf" "1" { Schematic "E:/ft_top/conter8.bdf" { { 16 392 504 176 "1" "" } } } } } 0}
{ "Info" "ISGN_SEARCH_FILE" "tf_ctro.bdf 1 1 " "Info: Using design file tf_ctro.bdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 tf_ctro " "Info: Found entity 1: tf_ctro" { } { { "tf_ctro.bdf" "" { Schematic "E:/ft_top/tf_ctro.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "tf_ctro tf_ctro:18 " "Info: Elaborating entity \"tf_ctro\" for hierarchy \"tf_ctro:18\"" { } { { "ft_top.bdf" "18" { Schematic "E:/ft_top/ft_top.bdf" { { 208 104 216 304 "18" "" } } } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/others/maxplus2/7493.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/others/maxplus2/7493.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 7493 " "Info: Found entity 1: 7493" { } { { "7493.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7493.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "7493 tf_ctro:18\|7493:2 " "Info: Elaborating entity \"7493\" for hierarchy \"tf_ctro:18\|7493:2\"" { } { { "tf_ctro.bdf" "2" { Schematic "E:/ft_top/tf_ctro.bdf" { { 144 152 272 256 "2" "" } } } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/others/maxplus2/74154.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/others/maxplus2/74154.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74154 " "Info: Found entity 1: 74154" { } { { "74154.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74154.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74154 tf_ctro:18\|74154:14 " "Info: Elaborating entity \"74154\" for hierarchy \"tf_ctro:18\|74154:14\"" { } { { "tf_ctro.bdf" "14" { Schematic "E:/ft_top/tf_ctro.bdf" { { 96 432 552 384 "14" "" } } } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/others/maxplus2/74248.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/others/maxplus2/74248.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74248 " "Info: Found entity 1: 74248" { } { { "74248.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74248.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74248 74248:5 " "Info: Elaborating entity \"74248\" for hierarchy \"74248:5\"" { } { { "ft_top.bdf" "5" { Schematic "E:/ft_top/ft_top.bdf" { { 240 712 824 400 "5" "" } } } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/others/maxplus2/74374.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/others/maxplus2/74374.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74374 " "Info: Found entity 1: 74374" { } { { "74374.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74374.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74374 74374:4 " "Info: Elaborating entity \"74374\" for hierarchy \"74374:4\"" { } { { "ft_top.bdf" "4" { Schematic "E:/ft_top/ft_top.bdf" { { 72 392 512 264 "4" "" } } } } } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "74374:4\|46 " "Warning: Converting TRI node \"74374:4\|46\" that feeds logic to an OR gate" { } { } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "74374:4\|45 " "Warning: Converting TRI node \"74374:4\|45\" that feeds logic to an OR gate" { } { } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "74374:4\|47 " "Warning: Converting TRI node \"74374:4\|47\" that feeds logic to an OR gate" { } { } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "74374:4\|44 " "Warning: Converting TRI node \"74374:4\|44\" that feeds logic to an OR gate" { } { } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "74374:4\|42 " "Warning: Converting TRI node \"74374:4\|42\" that feeds logic to an OR gate" { } { } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "74374:4\|41 " "Warning: Converting TRI node \"74374:4\|41\" that feeds logic to an OR gate" { } { } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "74374:4\|43 " "Warning: Converting TRI node \"74374:4\|43\" that feeds logic to an OR gate" { } { } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "74374:4\|40 " "Warning: Converting TRI node \"74374:4\|40\" that feeds logic to an OR gate" { } { } 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "CLK " "Info: Promoted clock signal driven by pin \"CLK\" to global clock signal" { } { } 0} } { } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "58 " "Info: Implemented 58 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" { } { } 0} { "Info" "ISCL_SCL_TM_OPINS" "15 " "Info: Implemented 15 output pins" { } { } 0} { "Info" "ISCL_SCL_TM_MCELLS" "37 " "Info: Implemented 37 macrocells" { } { } 0} { "Info" "ISCL_SCL_TM_SEXPS" "4 " "Info: Implemented 4 shareable expanders" { } { } 0} } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 8 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 8 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue May 15 22:04:07 2007 " "Info: Processing ended: Tue May 15 22:04:07 2007" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" { } { } 0} } { } 0}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -