📄 tf_ctro.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--B1_16 is 7493:2|16
B1_16_reg_input = VCC;
B1_16 = TFFE(B1_16_reg_input, !GLOBAL(clk), , , );
--B1_15 is 7493:2|15
B1_15_reg_input = VCC;
B1_15 = TFFE(B1_15_reg_input, !B1_16, , , );
--B1_14 is 7493:2|14
B1_14_or_out = B1_15;
B1_14_reg_input = B1_14_or_out;
B1_14 = TFFE(B1_14_reg_input, !B1_16, , , );
--B1_13 is 7493:2|13
B1_13_p1_out = B1_14 & B1_15;
B1_13_or_out = B1_13_p1_out;
B1_13_reg_input = B1_13_or_out;
B1_13 = TFFE(B1_13_reg_input, !B1_16, , , );
--A1L1 is 7~70
A1L1_p0_out = !B1_14 & !B1_13 & !B1_16 & B1_15;
A1L1_p1_out = !A1L1 & B1_14;
A1L1_p2_out = !A1L1 & B1_13;
A1L1_p3_out = !A1L1 & !B1_16;
A1L1_p4_out = !A1L1 & B1_15;
A1L1_or_out = A1L1_p0_out # A1L1_p1_out # A1L1_p2_out # A1L1_p3_out # A1L1_p4_out;
A1L1 = !(A1L1_or_out);
--A1L2 is 16~68
A1L2_p0_out = B1_14 & !B1_13 & !B1_16 & B1_15;
A1L2_p1_out = !A1L2 & !B1_14;
A1L2_p2_out = !A1L2 & B1_13;
A1L2_p3_out = !A1L2 & !B1_16;
A1L2_p4_out = !A1L2 & B1_15;
A1L2_or_out = A1L2_p0_out # A1L2_p1_out # A1L2_p2_out # A1L2_p3_out # A1L2_p4_out;
A1L2 = !(A1L2_or_out);
--clk is clk
--operation mode is input
clk = INPUT();
--CNT_EN is CNT_EN
--operation mode is output
CNT_EN = OUTPUT(B1_13);
--lock is lock
--operation mode is output
lock = OUTPUT(A1L1);
--clr is clr
--operation mode is output
clr = OUTPUT(A1L2);
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