📄 zuihou.rpt
字号:
D D D D D D D D D D D D D T D T D D D 3 D 7
A A
5 7
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
^ = Dedicated configuration pin.
+ = Reserved configuration pin, which is tri-stated during user mode.
* = Reserved configuration pin, which drives out in user mode.
PDn = Power Down pin.
@ = Special-purpose pin.
# = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use.
& = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration. JTAG pin stability prevents accidental loading of JTAG instructions.
Device-Specific Information: d:\ss\zuihou.rpt
zuihou
** RESOURCE USAGE **
Logic Column Row
Array Interconnect Interconnect Clears/ External
Block Logic Cells Driven Driven Clocks Presets Interconnect
A1 8/ 8(100%) 4/ 8( 50%) 7/ 8( 87%) 0/2 0/2 6/22( 27%)
A2 8/ 8(100%) 1/ 8( 12%) 2/ 8( 25%) 0/2 0/2 15/22( 68%)
A3 2/ 8( 25%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 4/22( 18%)
A4 8/ 8(100%) 1/ 8( 12%) 4/ 8( 50%) 0/2 0/2 11/22( 50%)
A5 8/ 8(100%) 1/ 8( 12%) 1/ 8( 12%) 0/2 0/2 16/22( 72%)
A6 7/ 8( 87%) 2/ 8( 25%) 2/ 8( 25%) 0/2 0/2 13/22( 59%)
A7 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 13/22( 59%)
A8 1/ 8( 12%) 0/ 8( 0%) 1/ 8( 12%) 0/2 0/2 3/22( 13%)
A9 2/ 8( 25%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 3/22( 13%)
A10 7/ 8( 87%) 1/ 8( 12%) 4/ 8( 50%) 0/2 0/2 13/22( 59%)
A11 8/ 8(100%) 0/ 8( 0%) 6/ 8( 75%) 0/2 0/2 12/22( 54%)
A12 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 13/22( 59%)
A13 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 16/22( 72%)
A14 8/ 8(100%) 3/ 8( 37%) 8/ 8(100%) 0/2 0/2 4/22( 18%)
A15 8/ 8(100%) 0/ 8( 0%) 4/ 8( 50%) 0/2 0/2 13/22( 59%)
A16 8/ 8(100%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 18/22( 81%)
A17 8/ 8(100%) 0/ 8( 0%) 1/ 8( 12%) 0/2 0/2 17/22( 77%)
A18 8/ 8(100%) 1/ 8( 12%) 8/ 8(100%) 0/2 0/2 10/22( 45%)
A19 4/ 8( 50%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 8/22( 36%)
A20 8/ 8(100%) 0/ 8( 0%) 4/ 8( 50%) 0/2 0/2 12/22( 54%)
A21 8/ 8(100%) 1/ 8( 12%) 8/ 8(100%) 0/2 0/2 6/22( 27%)
A22 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 12/22( 54%)
A23 6/ 8( 75%) 1/ 8( 12%) 2/ 8( 25%) 0/2 0/2 9/22( 40%)
A24 7/ 8( 87%) 1/ 8( 12%) 6/ 8( 75%) 0/2 0/2 7/22( 31%)
B1 8/ 8(100%) 1/ 8( 12%) 3/ 8( 37%) 0/2 0/2 13/22( 59%)
B2 8/ 8(100%) 0/ 8( 0%) 8/ 8(100%) 0/2 0/2 6/22( 27%)
B3 8/ 8(100%) 0/ 8( 0%) 5/ 8( 62%) 0/2 0/2 13/22( 59%)
B4 8/ 8(100%) 2/ 8( 25%) 5/ 8( 62%) 0/2 0/2 14/22( 63%)
B5 8/ 8(100%) 0/ 8( 0%) 6/ 8( 75%) 0/2 0/2 13/22( 59%)
B6 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 13/22( 59%)
B7 8/ 8(100%) 1/ 8( 12%) 3/ 8( 37%) 0/2 0/2 13/22( 59%)
B8 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 14/22( 63%)
B9 2/ 8( 25%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 5/22( 22%)
B10 8/ 8(100%) 2/ 8( 25%) 3/ 8( 37%) 0/2 0/2 11/22( 50%)
B11 8/ 8(100%) 0/ 8( 0%) 4/ 8( 50%) 0/2 0/2 13/22( 59%)
B12 7/ 8( 87%) 2/ 8( 25%) 3/ 8( 37%) 0/2 0/2 12/22( 54%)
B13 8/ 8(100%) 0/ 8( 0%) 4/ 8( 50%) 0/2 0/2 11/22( 50%)
B14 8/ 8(100%) 0/ 8( 0%) 4/ 8( 50%) 0/2 0/2 9/22( 40%)
B15 7/ 8( 87%) 3/ 8( 37%) 7/ 8( 87%) 1/2 1/2 6/22( 27%)
B16 8/ 8(100%) 2/ 8( 25%) 8/ 8(100%) 0/2 0/2 7/22( 31%)
B17 8/ 8(100%) 3/ 8( 37%) 5/ 8( 62%) 1/2 1/2 9/22( 40%)
B18 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 11/22( 50%)
B19 8/ 8(100%) 3/ 8( 37%) 3/ 8( 37%) 1/2 1/2 9/22( 40%)
B20 8/ 8(100%) 3/ 8( 37%) 2/ 8( 25%) 0/2 0/2 14/22( 63%)
B21 8/ 8(100%) 0/ 8( 0%) 4/ 8( 50%) 0/2 0/2 15/22( 68%)
B22 8/ 8(100%) 2/ 8( 25%) 5/ 8( 62%) 0/2 0/2 9/22( 40%)
B23 8/ 8(100%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 12/22( 54%)
B24 2/ 8( 25%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 5/22( 22%)
C1 2/ 8( 25%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 4/22( 18%)
C3 8/ 8(100%) 0/ 8( 0%) 1/ 8( 12%) 0/2 0/2 5/22( 22%)
C4 3/ 8( 37%) 0/ 8( 0%) 1/ 8( 12%) 0/2 0/2 7/22( 31%)
C5 3/ 8( 37%) 0/ 8( 0%) 1/ 8( 12%) 0/2 0/2 7/22( 31%)
C7 8/ 8(100%) 0/ 8( 0%) 5/ 8( 62%) 0/2 0/2 4/22( 18%)
C9 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 7/22( 31%)
C14 2/ 8( 25%) 2/ 8( 25%) 0/ 8( 0%) 0/2 0/2 4/22( 18%)
C18 2/ 8( 25%) 2/ 8( 25%) 0/ 8( 0%) 0/2 0/2 4/22( 18%)
C21 8/ 8(100%) 1/ 8( 12%) 2/ 8( 25%) 1/2 0/2 4/22( 18%)
C23 7/ 8( 87%) 5/ 8( 62%) 2/ 8( 25%) 2/2 2/2 5/22( 22%)
D9 7/ 8( 87%) 3/ 8( 37%) 1/ 8( 12%) 1/2 0/2 0/22( 0%)
D13 7/ 8( 87%) 0/ 8( 0%) 3/ 8( 37%) 1/2 0/2 2/22( 9%)
D24 6/ 8( 75%) 0/ 8( 0%) 3/ 8( 37%) 1/2 1/2 2/22( 9%)
E13 8/ 8(100%) 8/ 8(100%) 8/ 8(100%) 0/2 0/2 6/22( 27%)
E15 8/ 8(100%) 5/ 8( 62%) 6/ 8( 75%) 1/2 1/2 9/22( 40%)
E16 7/ 8( 87%) 4/ 8( 50%) 2/ 8( 25%) 0/2 0/2 10/22( 45%)
E17 8/ 8(100%) 3/ 8( 37%) 4/ 8( 50%) 0/2 0/2 7/22( 31%)
E18 8/ 8(100%) 3/ 8( 37%) 1/ 8( 12%) 0/2 0/2 13/22( 59%)
E19 6/ 8( 75%) 5/ 8( 62%) 3/ 8( 37%) 0/2 0/2 7/22( 31%)
E20 8/ 8(100%) 1/ 8( 12%) 3/ 8( 37%) 0/2 0/2 13/22( 59%)
E21 8/ 8(100%) 1/ 8( 12%) 1/ 8( 12%) 0/2 0/2 11/22( 50%)
E22 7/ 8( 87%) 1/ 8( 12%) 2/ 8( 25%) 0/2 0/2 12/22( 54%)
E23 1/ 8( 12%) 1/ 8( 12%) 1/ 8( 12%) 0/2 0/2 3/22( 13%)
E24 8/ 8(100%) 3/ 8( 37%) 2/ 8( 25%) 0/2 0/2 11/22( 50%)
F1 8/ 8(100%) 2/ 8( 25%) 2/ 8( 25%) 0/2 0/2 12/22( 54%)
F2 8/ 8(100%) 1/ 8( 12%) 2/ 8( 25%) 0/2 0/2 15/22( 68%)
F3 3/ 8( 37%) 3/ 8( 37%) 0/ 8( 0%) 0/2 0/2 6/22( 27%)
F4 8/ 8(100%) 1/ 8( 12%) 5/ 8( 62%) 0/2 0/2 9/22( 40%)
F5 8/ 8(100%) 1/ 8( 12%) 7/ 8( 87%) 0/2 0/2 9/22( 40%)
F6 7/ 8( 87%) 0/ 8( 0%) 4/ 8( 50%) 0/2 0/2 11/22( 50%)
F7 7/ 8( 87%) 0/ 8( 0%) 4/ 8( 50%) 0/2 0/2 10/22( 45%)
F8 2/ 8( 25%) 1/ 8( 12%) 2/ 8( 25%) 0/2 0/2 4/22( 18%)
F9 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 11/22( 50%)
F10 7/ 8( 87%) 0/ 8( 0%) 5/ 8( 62%) 0/2 0/2 8/22( 36%)
F12 7/ 8( 87%) 3/ 8( 37%) 2/ 8( 25%) 0/2 0/2 14/22( 63%)
F13 2/ 8( 25%) 2/ 8( 25%) 0/ 8( 0%) 0/2 0/2 4/22( 18%)
F16 8/ 8(100%) 2/ 8( 25%) 6/ 8( 75%) 1/2 1/2 9/22( 40%)
F17 2/ 8( 25%) 2/ 8( 25%) 1/ 8( 12%) 0/2 0/2 3/22( 13%)
F18 8/ 8(100%) 4/ 8( 50%) 5/ 8( 62%) 0/2 0/2 9/22( 40%)
F19 3/ 8( 37%) 3/ 8( 37%) 2/ 8( 25%) 0/2 0/2 5/22( 22%)
F20 8/ 8(100%) 4/ 8( 50%) 4/ 8( 50%) 1/2 1/2 6/22( 27%)
F21 1/ 8( 12%) 1/ 8( 12%) 1/ 8( 12%) 0/2 0/2 3/22( 13%)
F22 8/ 8(100%) 4/ 8( 50%) 5/ 8( 62%) 1/2 1/2 5/22( 22%)
F23 8/ 8(100%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 10/22( 45%)
F24 3/ 8( 37%) 0/ 8( 0%) 2/ 8( 25%) 0/2 0/2 7/22( 31%)
Embedded Column Row
Array Embedded Interconnect Interconnect Read/ External
Block Cells Driven Driven Clocks Write Interconnect
Total dedicated input pins used: 5/6 ( 83%)
Total I/O pins used: 31/96 ( 32%)
Total logic cells used: 614/1152 ( 53%)
Total embedded cells used: 0/48 ( 0%)
Total EABs used: 0/6 ( 0%)
Average fan-in: 3.36/4 ( 84%)
Total fan-in: 2068/4608 ( 44%)
Total input pins required: 5
Total input I/O cell registers required: 0
Total output pins required: 31
Total output I/O cell registers required: 0
Total buried I/O cell registers required: 0
Total bidirectional pins required: 0
Total reserved pins required 0
Total logic cells required: 614
Total flipflops required: 31
Total packed registers required: 0
Total logic cells in carry chains: 0
Total number of carry chains: 0
Total logic cells in cascade chains: 0
Total number of cascade chains: 0
Total single-pin Clock Enables required: 0
Total single-pin Output Enables required: 0
Synthesized logic cells: 232/1152 ( 20%)
Logic Cell and Embedded Cell Counts
Column: 01 02 03 04 05 06 07 08 09 10 11 12 EA 13 14 15 16 17 18 19 20 21 22 23 24 Total(LC/EC)
A: 8 8 2 8 8 7 8 1 2 7 8 8 0 8 8 8 8 8 8 4 8 8 8 6 7 164/0
B: 8 8 8 8 8 8 8 8 2 8 8 7 0 8 8 7 8 8 8 8 8 8 8 8 2 178/0
C: 2 0 8 3 3 0 8 0 8 0 0 0 0 0 2 0 0 0 2 0 0 8 0 7 0 51/0
D: 0 0 0 0 0 0 0 0 7 0 0 0 0 7 0 0 0 0 0 0 0 0 0 0 6 20/0
E: 0 0 0 0 0 0 0 0 0 0 0 0 0 8 0 8 7 8 8 6 8 8 7 1 8 77/0
F: 8 8 3 8 8 7 7 2 8 7 0 7 0 2 0 0 8 2 8 3 8 1 8 8 3 124/0
Total: 26 24 21 27 27 22 31 11 27 22 16 22 0 33 18 23 31 26 34 21 32 33 31 30 26 614/0
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