📄 couter.rpt
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** OUTPUTS **
Fed By Fed By Fan-In Fan-Out
Pin LC EC Row Col Primitive Code INP FBK OUT FBK Name
48 - - - 15 OUTPUT 0 1 0 0 SJXSH0
64 - - B -- OUTPUT 0 1 0 0 SJXSH1
65 - - B -- OUTPUT 0 1 0 0 SJXSH2
66 - - B -- OUTPUT 0 1 0 0 SJXSH3
51 - - - 18 OUTPUT 0 1 0 0 SJXSH4
50 - - - 17 OUTPUT 0 1 0 0 SJXSH5
49 - - - 16 OUTPUT 0 1 0 0 SJXSH6
67 - - B -- OUTPUT 0 1 0 0 SJXSH7
24 - - B -- OUTPUT 0 1 0 0 tJ
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
@ = Uses single-pin Clock Enable
& = Uses single-pin Output Enable
Device-Specific Information: f:\ss\ss\couter.rpt
couter
** BURIED LOGIC **
Fan-In Fan-Out
IOC LC EC Row Col Primitive Code INP FBK OUT FBK Name
- 4 - B 16 OR2 0 3 0 1 |LPM_ADD_SUB:225|addcore:adder|pcarry2
- 5 - B 16 OR2 0 4 0 3 |LPM_ADD_SUB:225|addcore:adder|pcarry3
- 8 - B 18 OR2 0 3 0 3 |LPM_ADD_SUB:225|addcore:adder|pcarry5
- 4 - B 15 OR2 0 2 0 7 |LPM_ADD_SUB:225|addcore:adder|pcarry6
- 6 - B 17 AND2 0 2 0 2 |LPM_ADD_SUB:368|addcore:adder|:75
- 1 - B 17 AND2 0 2 0 5 |LPM_ADD_SUB:368|addcore:adder|:79
- 8 - B 17 AND2 0 2 0 1 |LPM_ADD_SUB:368|addcore:adder|:83
- 6 - B 13 AND2 0 3 0 1 |LPM_ADD_SUB:368|addcore:adder|:87
- 1 - B 13 AND2 0 4 0 2 |LPM_ADD_SUB:368|addcore:adder|:91
- 3 - B 13 AND2 0 2 0 1 |LPM_ADD_SUB:368|addcore:adder|:95
- 5 - B 22 DFFE + 1 1 1 0 :19
- 1 - B 15 DFFE + 1 1 1 8 linshi17 (:21)
- 8 - B 15 DFFE + 1 3 1 3 linshi16 (:22)
- 5 - B 18 DFFE + 1 3 1 2 linshi15 (:23)
- 1 - B 18 DFFE + 1 3 1 3 linshi14 (:24)
- 3 - B 18 DFFE + 1 3 1 2 linshi13 (:25)
- 8 - B 16 DFFE + 1 3 1 3 linshi12 (:26)
- 7 - B 16 DFFE + 1 3 1 4 linshi11 (:27)
- 6 - B 16 DFFE + 1 2 1 4 linshi10 (:28)
- 4 - B 13 DFFE + 1 2 0 1 linshi27 (:29)
- 5 - B 13 DFFE + 1 2 0 2 linshi26 (:30)
- 7 - B 13 DFFE + 1 2 0 2 linshi25 (:31)
- 4 - B 17 DFFE + 1 2 0 3 linshi24 (:32)
- 2 - B 17 DFFE + 1 2 0 4 linshi23 (:33)
- 7 - B 17 DFFE + 1 2 0 1 linshi22 (:34)
- 5 - B 17 DFFE + 1 2 0 1 linshi21 (:35)
- 3 - B 17 DFFE + 1 1 0 2 linshi20 (:36)
- 2 - B 18 OR2 ! 0 2 0 10 :122
- 8 - B 13 AND2 s 0 3 0 1 ~175~1
- 2 - B 13 AND2 0 4 0 8 :175
- 2 - B 15 OR2 0 3 0 1 :321
- 6 - B 18 OR2 0 4 0 1 :327
- 4 - B 18 OR2 0 3 0 1 :333
- 1 - B 16 OR2 0 3 0 1 :339
- 3 - B 16 OR2 0 4 0 1 :345
- 2 - B 16 OR2 0 3 0 1 :351
- 3 - B 15 OR2 0 4 0 1 :460
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: f:\ss\ss\couter.rpt
couter
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
B: 6/ 96( 6%) 0/ 48( 0%) 14/ 48( 29%) 4/16( 25%) 5/16( 31%) 0/16( 0%)
C: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
16: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
17: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
18: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: f:\ss\ss\couter.rpt
couter
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 17 clk
Device-Specific Information: f:\ss\ss\couter.rpt
couter
** EQUATIONS **
CHUSHItime0 : INPUT;
CHUSHItime1 : INPUT;
CHUSHItime2 : INPUT;
CHUSHItime3 : INPUT;
CHUSHItime4 : INPUT;
CHUSHItime5 : INPUT;
CHUSHItime6 : INPUT;
CHUSHItime7 : INPUT;
clk : INPUT;
start : INPUT;
-- Node name is ':28' = 'linshi10'
-- Equation name is 'linshi10', location is LC6_B16, type is buried.
linshi10 = DFFE( _EQ001, GLOBAL( clk), !(GLOBAL(!start) & !CHUSHItime0), !(GLOBAL(!start) & CHUSHItime0), VCC);
_EQ001 = !_LC2_B13 & !_LC2_B18 & linshi10
# _LC2_B13 & !_LC2_B18 & !linshi10;
-- Node name is ':27' = 'linshi11'
-- Equation name is 'linshi11', location is LC7_B16, type is buried.
linshi11 = DFFE( _EQ002, GLOBAL( clk), !(GLOBAL(!start) & !CHUSHItime1), !(GLOBAL(!start) & CHUSHItime1), VCC);
_EQ002 = _LC2_B16 & linshi17
# _LC2_B16 & _LC4_B15;
-- Node name is ':26' = 'linshi12'
-- Equation name is 'linshi12', location is LC8_B16, type is buried.
linshi12 = DFFE( _EQ003, GLOBAL( clk), !(GLOBAL(!start) & !CHUSHItime2), !(GLOBAL(!start) & CHUSHItime2), VCC);
_EQ003 = _LC3_B16 & linshi17
# _LC3_B16 & _LC4_B15;
-- Node name is ':25' = 'linshi13'
-- Equation name is 'linshi13', location is LC3_B18, type is buried.
linshi13 = DFFE( _EQ004, GLOBAL( clk), !(GLOBAL(!start) & !CHUSHItime3), !(GLOBAL(!start) & CHUSHItime3), VCC);
_EQ004 = _LC1_B16 & linshi17
# _LC1_B16 & _LC4_B15;
-- Node name is ':24' = 'linshi14'
-- Equation name is 'linshi14', location is LC1_B18, type is buried.
linshi14 = DFFE( _EQ005, GLOBAL( clk), !(GLOBAL(!start) & !CHUSHItime4), !(GLOBAL(!start) & CHUSHItime4), VCC);
_EQ005 = _LC4_B18 & linshi17
# _LC4_B15 & _LC4_B18;
-- Node name is ':23' = 'linshi15'
-- Equation name is 'linshi15', location is LC5_B18, type is buried.
linshi15 = DFFE( _EQ006, GLOBAL( clk), !(GLOBAL(!start) & !CHUSHItime5), !(GLOBAL(!start) & CHUSHItime5), VCC);
_EQ006 = _LC6_B18 & linshi17
# _LC4_B15 & _LC6_B18;
-- Node name is ':22' = 'linshi16'
-- Equation name is 'linshi16', location is LC8_B15, type is buried.
linshi16 = DFFE( _EQ007, GLOBAL( clk), !(GLOBAL(!start) & !CHUSHItime6), !(GLOBAL(!start) & CHUSHItime6), VCC);
_EQ007 = _LC2_B15 & linshi17
# _LC2_B15 & _LC4_B15;
-- Node name is ':21' = 'linshi17'
-- Equation name is 'linshi17', location is LC1_B15, type is buried.
linshi17 = DFFE( _LC3_B15, GLOBAL( clk), !(GLOBAL(!start) & !CHUSHItime7), !(GLOBAL(!start) & CHUSHItime7), VCC);
-- Node name is ':36' = 'linshi20'
-- Equation name is 'linshi20', location is LC3_B17, type is buried.
linshi20 = DFFE( _EQ008, GLOBAL( clk), VCC, VCC, start);
_EQ008 = !_LC2_B18 & !linshi20
# _LC2_B18 & linshi20;
-- Node name is ':35' = 'linshi21'
-- Equation name is 'linshi21', location is LC5_B17, type is buried.
linshi21 = DFFE( _EQ009, GLOBAL( clk), VCC, VCC, start);
_EQ009 = _LC2_B18 & linshi21
# !linshi20 & linshi21
# !_LC2_B18 & linshi20 & !linshi21;
-- Node name is ':34' = 'linshi22'
-- Equation name is 'linshi22', location is LC7_B17, type is buried.
linshi22 = DFFE( _EQ010, GLOBAL( clk), VCC, VCC, start);
_EQ010 = _LC2_B18 & linshi22
# !_LC6_B17 & linshi22
# !_LC2_B18 & _LC6_B17 & !linshi22;
-- Node name is ':33' = 'linshi23'
-- Equation name is 'linshi23', location is LC2_B17, type is buried.
linshi23 = DFFE( _EQ011, GLOBAL( clk), VCC, VCC, start);
_EQ011 = _LC2_B18 & linshi23
# !_LC1_B17 & linshi23
# _LC1_B17 & !_LC2_B18 & !linshi23;
-- Node name is ':32' = 'linshi24'
-- Equation name is 'linshi24', location is LC4_B17, type is buried.
linshi24 = DFFE( _EQ012, GLOBAL( clk), VCC, VCC, start);
_EQ012 = _LC2_B18 & linshi24
# !_LC8_B17 & linshi24
# !_LC2_B18 & _LC8_B17 & !linshi24;
-- Node name is ':31' = 'linshi25'
-- Equation name is 'linshi25', location is LC7_B13, type is buried.
linshi25 = DFFE( _EQ013, GLOBAL( clk), VCC, VCC, start);
_EQ013 = _LC2_B18 & linshi25
# !_LC6_B13 & linshi25
# !_LC2_B18 & _LC6_B13 & !linshi25;
-- Node name is ':30' = 'linshi26'
-- Equation name is 'linshi26', location is LC5_B13, type is buried.
linshi26 = DFFE( _EQ014, GLOBAL( clk), VCC, VCC, start);
_EQ014 = _LC2_B18 & linshi26
# !_LC1_B13 & linshi26
# _LC1_B13 & !_LC2_B18 & !linshi26;
-- Node name is ':29' = 'linshi27'
-- Equation name is 'linshi27', location is LC4_B13, type is buried.
linshi27 = DFFE( _EQ015, GLOBAL( clk), VCC, VCC, start);
_EQ015 = _LC2_B18 & linshi27
# !_LC3_B13 & linshi27
# !_LC2_B18 & _LC3_B13 & !linshi27;
-- Node name is 'SJXSH0'
-- Equation name is 'SJXSH0', type is output
SJXSH0 = linshi10;
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