📄 buzzer.fit.rpt
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+---------------------------------------------------------------------------+
; LAB Logic Elements ;
+--------------------------------------------+------------------------------+
; Number of Logic Elements (Average = 8.09) ; Number of LABs (Total = 11) ;
+--------------------------------------------+------------------------------+
; 1 ; 1 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 1 ;
; 7 ; 0 ;
; 8 ; 1 ;
; 9 ; 0 ;
; 10 ; 7 ;
+--------------------------------------------+------------------------------+
+-------------------------------------------------------------------+
; LAB-wide Signals ;
+------------------------------------+------------------------------+
; LAB-wide Signals (Average = 2.18) ; Number of LABs (Total = 11) ;
+------------------------------------+------------------------------+
; 1 Async. clear ; 8 ;
; 1 Clock ; 8 ;
; 1 Clock enable ; 7 ;
; 1 Sync. clear ; 1 ;
+------------------------------------+------------------------------+
+----------------------------------------------------------------------------+
; LAB Signals Sourced ;
+---------------------------------------------+------------------------------+
; Number of Signals Sourced (Average = 8.09) ; Number of LABs (Total = 11) ;
+---------------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 1 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 1 ;
; 7 ; 0 ;
; 8 ; 1 ;
; 9 ; 0 ;
; 10 ; 7 ;
+---------------------------------------------+------------------------------+
+--------------------------------------------------------------------------------+
; LAB Signals Sourced Out ;
+-------------------------------------------------+------------------------------+
; Number of Signals Sourced Out (Average = 4.64) ; Number of LABs (Total = 11) ;
+-------------------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 3 ;
; 2 ; 1 ;
; 3 ; 1 ;
; 4 ; 1 ;
; 5 ; 1 ;
; 6 ; 0 ;
; 7 ; 1 ;
; 8 ; 1 ;
; 9 ; 1 ;
; 10 ; 1 ;
+-------------------------------------------------+------------------------------+
+-----------------------------------------------------------------------------+
; LAB Distinct Inputs ;
+----------------------------------------------+------------------------------+
; Number of Distinct Inputs (Average = 10.55) ; Number of LABs (Total = 11) ;
+----------------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 1 ;
; 3 ; 0 ;
; 4 ; 2 ;
; 5 ; 1 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 1 ;
; 11 ; 2 ;
; 12 ; 0 ;
; 13 ; 0 ;
; 14 ; 1 ;
; 15 ; 0 ;
; 16 ; 1 ;
; 17 ; 1 ;
; 18 ; 0 ;
; 19 ; 0 ;
; 20 ; 0 ;
; 21 ; 0 ;
; 22 ; 1 ;
+----------------------------------------------+------------------------------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
Info: Processing started: Thu Feb 16 17:57:50 2006
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off buzzer -c buzzer
Info: Selected device EPM1270T144C5 for design "buzzer"
Info: Fitter is performing a Standard Fit compilation using maximum Fitter effort to optimize design performance
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices.
Info: Device EPM570T144C5 is compatible
Info: Device EPM570T144I5 is compatible
Info: Device EPM1270T144I5 is compatible
Info: Device EPM1270T144C5ES is compatible
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
Info: Assuming a global fmax requirement of 1000 MHz
Info: Assuming a global tsu requirement of 2.0 ns
Info: Assuming a global tco requirement of 1.0 ns
Info: Assuming a global tpd requirement of 1.0 ns
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: Automatically promoted signal "clk" to use Global clock
Info: Pin "clk" drives global clock, but is not placed in a dedicated clock pin position
Info: Automatically promoted signal "rst" to use Global clock
Info: Pin "rst" drives global clock, but is not placed in a dedicated clock pin position
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Moving registers into LUTs to improve timing and density
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished moving registers into LUTs
Info: Finished register packing
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Estimated most critical path is register to register delay of 12.717 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X8_Y7; Fanout = 10; REG Node = 'clk_div2[1]'
Info: 2: + IC(1.850 ns) + CELL(0.740 ns) = 2.590 ns; Loc. = LAB_X9_Y6; Fanout = 2; COMB Node = 'reduce_or~289'
Info: 3: + IC(2.213 ns) + CELL(0.200 ns) = 5.003 ns; Loc. = LAB_X10_Y7; Fanout = 1; COMB Node = 'reduce_or~8'
Info: 4: + IC(1.439 ns) + CELL(0.914 ns) = 7.356 ns; Loc. = LAB_X8_Y7; Fanout = 1; COMB Node = 'clk_div2[0]~1754'
Info: 5: + IC(0.983 ns) + CELL(0.200 ns) = 8.539 ns; Loc. = LAB_X8_Y7; Fanout = 1; COMB Node = 'clk_div2[0]~1758'
Info: 6: + IC(0.443 ns) + CELL(0.740 ns) = 9.722 ns; Loc. = LAB_X8_Y7; Fanout = 13; COMB Node = 'clk_div2[0]~1759'
Info: 7: + IC(1.235 ns) + CELL(1.760 ns) = 12.717 ns; Loc. = LAB_X9_Y7; Fanout = 4; REG Node = 'clk_div2[12]'
Info: Total cell delay = 4.554 ns ( 35.81 % )
Info: Total interconnect delay = 8.163 ns ( 64.19 % )
Info: Fitter placement operations ending: elapsed time is 00:00:01
Info: Fitter routing operations beginning
Info: Average interconnect usage is 1% of the available device resources. Peak interconnect usage is 1%.
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
Info: Processing ended: Thu Feb 16 17:57:54 2006
Info: Elapsed time: 00:00:04
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