buzzer.map.eqn

蜂鸣器实验 向蜂鸣器发送一定频率的方波可以使蜂鸣器发出相应的音调

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--out_bit_tmp is out_bit_tmp
--operation mode is normal

out_bit_tmp_lut_out = state[2] & (out_bit_tmp $ A1L78) # !state[2] & (A1L19);
out_bit_tmp = DFFEAS(out_bit_tmp_lut_out, clk, rst, , A1L59, , , , );


--state[0] is state[0]
--operation mode is normal

state[0]_lut_out = state[0] $ !A1L49;
state[0] = DFFEAS(state[0]_lut_out, clk, rst, , A1L59, , , , );


--clk_div2[5] is clk_div2[5]
--operation mode is arithmetic

clk_div2[5]_carry_eqn = A1L42;
clk_div2[5]_lut_out = clk_div2[5] $ (clk_div2[5]_carry_eqn);
clk_div2[5] = DFFEAS(clk_div2[5]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L62 is clk_div2[5]~1703
--operation mode is arithmetic

A1L62 = CARRY(!A1L42 # !clk_div2[5]);


--clk_div2[4] is clk_div2[4]
--operation mode is arithmetic

clk_div2[4]_carry_eqn = A1L22;
clk_div2[4]_lut_out = clk_div2[4] $ (!clk_div2[4]_carry_eqn);
clk_div2[4] = DFFEAS(clk_div2[4]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L42 is clk_div2[4]~1707
--operation mode is arithmetic

A1L42 = CARRY(clk_div2[4] & (!A1L22));


--clk_div2[12] is clk_div2[12]
--operation mode is normal

clk_div2[12]_carry_eqn = A1L83;
clk_div2[12]_lut_out = clk_div2[12] $ (!clk_div2[12]_carry_eqn);
clk_div2[12] = DFFEAS(clk_div2[12]_lut_out, clk, rst, , A1L59, , , A1L61, );


--clk_div2[3] is clk_div2[3]
--operation mode is arithmetic

clk_div2[3]_carry_eqn = A1L02;
clk_div2[3]_lut_out = clk_div2[3] $ (clk_div2[3]_carry_eqn);
clk_div2[3] = DFFEAS(clk_div2[3]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L22 is clk_div2[3]~1715
--operation mode is arithmetic

A1L22 = CARRY(!A1L02 # !clk_div2[3]);


--clk_div2[8] is clk_div2[8]
--operation mode is arithmetic

clk_div2[8]_carry_eqn = A1L03;
clk_div2[8]_lut_out = clk_div2[8] $ (!clk_div2[8]_carry_eqn);
clk_div2[8] = DFFEAS(clk_div2[8]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L23 is clk_div2[8]~1719
--operation mode is arithmetic

A1L23 = CARRY(clk_div2[8] & (!A1L03));


--clk_div2[0] is clk_div2[0]
--operation mode is arithmetic

clk_div2[0]_lut_out = !clk_div2[0];
clk_div2[0] = DFFEAS(clk_div2[0]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L01 is clk_div2[0]~1723
--operation mode is arithmetic

A1L01 = CARRY(clk_div2[0]);


--A1L301 is reduce_or~287
--operation mode is normal

A1L301 = !clk_div2[3] & clk_div2[8] & clk_div2[0];


--A1L401 is reduce_or~288
--operation mode is normal

A1L401 = clk_div2[5] & clk_div2[4] & !clk_div2[12] & A1L301;


--clk_div2[6] is clk_div2[6]
--operation mode is arithmetic

clk_div2[6]_carry_eqn = A1L62;
clk_div2[6]_lut_out = clk_div2[6] $ (!clk_div2[6]_carry_eqn);
clk_div2[6] = DFFEAS(clk_div2[6]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L82 is clk_div2[6]~1727
--operation mode is arithmetic

A1L82 = CARRY(clk_div2[6] & (!A1L62));


--clk_div2[1] is clk_div2[1]
--operation mode is arithmetic

clk_div2[1]_carry_eqn = A1L01;
clk_div2[1]_lut_out = clk_div2[1] $ (clk_div2[1]_carry_eqn);
clk_div2[1] = DFFEAS(clk_div2[1]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L81 is clk_div2[1]~1731
--operation mode is arithmetic

A1L81 = CARRY(!A1L01 # !clk_div2[1]);


--clk_div2[2] is clk_div2[2]
--operation mode is arithmetic

clk_div2[2]_carry_eqn = A1L81;
clk_div2[2]_lut_out = clk_div2[2] $ (!clk_div2[2]_carry_eqn);
clk_div2[2] = DFFEAS(clk_div2[2]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L02 is clk_div2[2]~1735
--operation mode is arithmetic

A1L02 = CARRY(clk_div2[2] & (!A1L81));


--A1L501 is reduce_or~289
--operation mode is normal

A1L501 = clk_div2[6] & clk_div2[1] & clk_div2[2];


--clk_div2[9] is clk_div2[9]
--operation mode is arithmetic

clk_div2[9]_carry_eqn = A1L23;
clk_div2[9]_lut_out = clk_div2[9] $ (clk_div2[9]_carry_eqn);
clk_div2[9] = DFFEAS(clk_div2[9]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L43 is clk_div2[9]~1739
--operation mode is arithmetic

A1L43 = CARRY(!A1L23 # !clk_div2[9]);


--clk_div2[10] is clk_div2[10]
--operation mode is arithmetic

clk_div2[10]_carry_eqn = A1L43;
clk_div2[10]_lut_out = clk_div2[10] $ (!clk_div2[10]_carry_eqn);
clk_div2[10] = DFFEAS(clk_div2[10]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L63 is clk_div2[10]~1743
--operation mode is arithmetic

A1L63 = CARRY(clk_div2[10] & (!A1L43));


--clk_div2[7] is clk_div2[7]
--operation mode is arithmetic

clk_div2[7]_carry_eqn = A1L82;
clk_div2[7]_lut_out = clk_div2[7] $ (clk_div2[7]_carry_eqn);
clk_div2[7] = DFFEAS(clk_div2[7]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L03 is clk_div2[7]~1747
--operation mode is arithmetic

A1L03 = CARRY(!A1L82 # !clk_div2[7]);


--clk_div2[11] is clk_div2[11]
--operation mode is arithmetic

clk_div2[11]_carry_eqn = A1L63;
clk_div2[11]_lut_out = clk_div2[11] $ (clk_div2[11]_carry_eqn);
clk_div2[11] = DFFEAS(clk_div2[11]_lut_out, clk, rst, , A1L59, , , A1L61, );

--A1L83 is clk_div2[11]~1751
--operation mode is arithmetic

A1L83 = CARRY(!A1L63 # !clk_div2[11]);


--A1L601 is reduce_or~290
--operation mode is normal

A1L601 = clk_div2[9] # clk_div2[10] # !clk_div2[11] # !clk_div2[7];


--state[1] is state[1]
--operation mode is normal

state[1]_lut_out = state[1] $ (!A1L49 & (state[0]));
state[1] = DFFEAS(state[1]_lut_out, clk, rst, , A1L59, , , , );


--A1L701 is reduce_or~291
--operation mode is normal

A1L701 = clk_div2[7] # clk_div2[11] # !clk_div2[10] # !clk_div2[9];


--A1L48 is Mux~387
--operation mode is normal

A1L48 = A1L501 & (state[1] & (!A1L701) # !state[1] & !A1L601);


--A1L58 is Mux~388
--operation mode is normal

A1L58 = A1L401 & A1L48;


--A1L801 is reduce_or~292
--operation mode is normal

A1L801 = clk_div2[6] & clk_div2[3] & !clk_div2[12] & !clk_div2[0];


--A1L901 is reduce_or~293
--operation mode is normal

A1L901 = clk_div2[7] & clk_div2[9] & A1L801;


--A1L011 is reduce_or~294
--operation mode is normal

A1L011 = clk_div2[5] & clk_div2[10] & A1L901 & !clk_div2[4];


--A1L111 is reduce_or~295
--operation mode is normal

A1L111 = clk_div2[1] # clk_div2[2] # clk_div2[11] # !clk_div2[8];


--A1L211 is reduce_or~296
--operation mode is normal

A1L211 = clk_div2[3] # clk_div2[2] # clk_div2[8] # !clk_div2[5];


--A1L311 is reduce_or~297
--operation mode is normal

A1L311 = clk_div2[6] & clk_div2[11] & !clk_div2[12] & !clk_div2[1];


--A1L411 is reduce_or~298
--operation mode is normal

A1L411 = clk_div2[0] & A1L311 & !clk_div2[9] & !clk_div2[4];


--A1L511 is reduce_or~299
--operation mode is normal

A1L511 = clk_div2[10] # A1L211 # !A1L411 # !clk_div2[7];


--A1L68 is Mux~389
--operation mode is normal

A1L68 = state[1] & A1L011 & !A1L111 # !state[1] & (A1L511);


--A1L78 is Mux~390
--operation mode is normal

A1L78 = state[0] & (state[1] & A1L58 # !state[1] & (!A1L68)) # !state[0] & (state[1] & (A1L68) # !state[1] & A1L58);


--A1L611 is reduce_or~300
--operation mode is normal

A1L611 = clk_div2[5] # !clk_div2[8] # !clk_div2[2] # !clk_div2[10];


--A1L711 is reduce_or~301
--operation mode is normal

A1L711 = clk_div2[7] # A1L611 # !A1L411 # !clk_div2[3];


--A1L811 is reduce_or~302
--operation mode is normal

A1L811 = clk_div2[8] # !clk_div2[11] # !clk_div2[2] # !clk_div2[1];


--A1L88 is Mux~391
--operation mode is normal

A1L88 = out_bit_tmp $ (A1L011 & !A1L811 & !state[0]);


--A1L98 is Mux~392
--operation mode is normal

A1L98 = state[1] & (state[0]) # !state[1] & (A1L88 $ (!A1L711 & state[0]));


--A1L911 is reduce_or~303
--operation mode is normal

A1L911 = clk_div2[5] # !clk_div2[8] # !clk_div2[4];


--A1L021 is reduce_or~304
--operation mode is normal

A1L021 = clk_div2[11] & (!clk_div2[10] & !clk_div2[2]);


--A1L121 is reduce_or~305
--operation mode is normal

A1L121 = A1L911 # !A1L021 # !A1L901 # !clk_div2[1];


--A1L221 is reduce_or~306
--operation mode is normal

A1L221 = clk_div2[6] # clk_div2[7] # !clk_div2[9];


--A1L321 is reduce_or~307
--operation mode is normal

A1L321 = clk_div2[1] # A1L221 # !A1L021 # !A1L401;


--A1L09 is Mux~393
--operation mode is normal

A1L09 = A1L98 & (A1L321) # !A1L98 & A1L121;


--A1L19 is Mux~394
--operation mode is normal

A1L19 = state[1] & (out_bit_tmp $ (!A1L09)) # !state[1] & (A1L98);


--state[2] is state[2]
--operation mode is normal

state[2]_lut_out = state[2] $ (state[1] & state[0] & !A1L49);
state[2] = DFFEAS(state[2]_lut_out, clk, rst, , A1L59, , , , );


--clk_div1[2] is clk_div1[2]
--operation mode is normal

clk_div1[2]_lut_out = !clk_div1[2];
clk_div1[2] = DFFEAS(clk_div1[2]_lut_out, clk, rst, , A1L1, , , , );


--clk_div1[1] is clk_div1[1]
--operation mode is normal

clk_div1[1]_lut_out = clk_div1[1] & (!clk_div1[0]) # !clk_div1[1] & clk_div1[0] & (clk_div1[2] # !clk_div1[3]);
clk_div1[1] = DFFEAS(clk_div1[1]_lut_out, clk, rst, , , , , , );


--clk_div1[0] is clk_div1[0]
--operation mode is normal

clk_div1[0]_lut_out = !clk_div1[0];
clk_div1[0] = DFFEAS(clk_div1[0]_lut_out, clk, rst, , , , , , );


--clk_div1[3] is clk_div1[3]
--operation mode is normal

clk_div1[3]_lut_out = clk_div1[3] & (clk_div1[2] $ clk_div1[1] # !clk_div1[0]) # !clk_div1[3] & clk_div1[2] & clk_div1[1] & clk_div1[0];
clk_div1[3] = DFFEAS(clk_div1[3]_lut_out, clk, rst, , , , , , );