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📄 booth_com.tan.qmsg

📁 布思基四乘法器实现,很好用,快来看,希望对大家有所帮助.
💻 QMSG
📖 第 1 页 / 共 3 页
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{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK " "Info: Assuming node \"CLK\" is an undefined clock" {  } { { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 31 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register m2_reg\[1\] register pro_reg\[7\] 89.67 MHz 11.152 ns Internal " "Info: Clock \"CLK\" has Internal fmax of 89.67 MHz between source register \"m2_reg\[1\]\" and destination register \"pro_reg\[7\]\" (period= 11.152 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.709 ns + Longest register register " "Info: + Longest register to register delay is 10.709 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns m2_reg\[1\] 1 REG LC_X4_Y2_N4 16 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X4_Y2_N4; Fanout = 16; REG Node = 'm2_reg\[1\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "" { m2_reg[1] } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 37 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.583 ns) + CELL(0.571 ns) 1.154 ns pro_tmp~130 2 COMB LC_X4_Y2_N5 7 " "Info: 2: + IC(0.583 ns) + CELL(0.571 ns) = 1.154 ns; Loc. = LC_X4_Y2_N5; Fanout = 7; COMB Node = 'pro_tmp~130'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.154 ns" { m2_reg[1] pro_tmp~130 } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.448 ns) + CELL(0.611 ns) 2.213 ns add~712 3 COMB LC_X4_Y2_N6 2 " "Info: 3: + IC(0.448 ns) + CELL(0.611 ns) = 2.213 ns; Loc. = LC_X4_Y2_N6; Fanout = 2; COMB Node = 'add~712'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.059 ns" { pro_tmp~130 add~712 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.509 ns) 2.722 ns add~735 4 COMB LC_X4_Y2_N7 1 " "Info: 4: + IC(0.000 ns) + CELL(0.509 ns) = 2.722 ns; Loc. = LC_X4_Y2_N7; Fanout = 1; COMB Node = 'add~735'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "0.509 ns" { add~712 add~735 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.726 ns) + CELL(0.462 ns) 3.910 ns Select~1264 5 COMB LC_X5_Y2_N0 1 " "Info: 5: + IC(0.726 ns) + CELL(0.462 ns) = 3.910 ns; Loc. = LC_X5_Y2_N0; Fanout = 1; COMB Node = 'Select~1264'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.188 ns" { add~735 Select~1264 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.113 ns) + CELL(0.125 ns) 5.148 ns Select~1265 6 COMB LC_X5_Y3_N5 7 " "Info: 6: + IC(1.113 ns) + CELL(0.125 ns) = 5.148 ns; Loc. = LC_X5_Y3_N5; Fanout = 7; COMB Node = 'Select~1265'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.238 ns" { Select~1264 Select~1265 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.449 ns) + CELL(0.611 ns) 6.208 ns add~727 7 COMB LC_X5_Y3_N1 2 " "Info: 7: + IC(0.449 ns) + CELL(0.611 ns) = 6.208 ns; Loc. = LC_X5_Y3_N1; Fanout = 2; COMB Node = 'add~727'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.060 ns" { Select~1265 add~727 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.509 ns) 6.717 ns add~741 8 COMB LC_X5_Y3_N2 1 " "Info: 8: + IC(0.000 ns) + CELL(0.509 ns) = 6.717 ns; Loc. = LC_X5_Y3_N2; Fanout = 1; COMB Node = 'add~741'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "0.509 ns" { add~727 add~741 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.695 ns) + CELL(0.462 ns) 7.874 ns Select~1266 9 COMB LC_X6_Y3_N5 1 " "Info: 9: + IC(0.695 ns) + CELL(0.462 ns) = 7.874 ns; Loc. = LC_X6_Y3_N5; Fanout = 1; COMB Node = 'Select~1266'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.157 ns" { add~741 Select~1266 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.191 ns) + CELL(0.125 ns) 8.190 ns Select~1273 10 COMB LC_X6_Y3_N6 4 " "Info: 10: + IC(0.191 ns) + CELL(0.125 ns) = 8.190 ns; Loc. = LC_X6_Y3_N6; Fanout = 4; COMB Node = 'Select~1273'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "0.316 ns" { Select~1266 Select~1273 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.172 ns) + CELL(0.467 ns) 9.829 ns pro_reg\[3\]~518 11 COMB LC_X4_Y3_N1 2 " "Info: 11: + IC(1.172 ns) + CELL(0.467 ns) = 9.829 ns; Loc. = LC_X4_Y3_N1; Fanout = 2; COMB Node = 'pro_reg\[3\]~518'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.639 ns" { Select~1273 pro_reg[3]~518 } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.077 ns) 9.906 ns pro_reg\[4\]~522 12 COMB LC_X4_Y3_N2 2 " "Info: 12: + IC(0.000 ns) + CELL(0.077 ns) = 9.906 ns; Loc. = LC_X4_Y3_N2; Fanout = 2; COMB Node = 'pro_reg\[4\]~522'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "0.077 ns" { pro_reg[3]~518 pro_reg[4]~522 } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.077 ns) 9.983 ns pro_reg\[5\]~526 13 COMB LC_X4_Y3_N3 1 " "Info: 13: + IC(0.000 ns) + CELL(0.077 ns) = 9.983 ns; Loc. = LC_X4_Y3_N3; Fanout = 1; COMB Node = 'pro_reg\[5\]~526'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "0.077 ns" { pro_reg[4]~522 pro_reg[5]~526 } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.726 ns) 10.709 ns pro_reg\[7\] 14 REG LC_X4_Y3_N4 2 " "Info: 14: + IC(0.000 ns) + CELL(0.726 ns) = 10.709 ns; Loc. = LC_X4_Y3_N4; Fanout = 2; REG Node = 'pro_reg\[7\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "0.726 ns" { pro_reg[5]~526 pro_reg[7] } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 42 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.332 ns 49.79 % " "Info: Total cell delay = 5.332 ns ( 49.79 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.377 ns 50.21 % " "Info: Total interconnect delay = 5.377 ns ( 50.21 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "10.709 ns" { m2_reg[1] pro_tmp~130 add~712 add~735 Select~1264 Select~1265 add~727 add~741 Select~1266 Select~1273 pro_reg[3]~518 pro_reg[4]~522 pro_reg[5]~526 pro_reg[7] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "10.709 ns" { m2_reg[1] pro_tmp~130 add~712 add~735 Select~1264 Select~1265 add~727 add~741 Select~1266 Select~1273 pro_reg[3]~518 pro_reg[4]~522 pro_reg[5]~526 pro_reg[7] } { 0.000ns 0.583ns 0.448ns 0.000ns 0.726ns 1.113ns 0.449ns 0.000ns 0.695ns 0.191ns 1.172ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.571ns 0.611ns 0.509ns 0.462ns 0.125ns 0.611ns 0.509ns 0.462ns 0.125ns 0.467ns 0.077ns 0.077ns 0.726ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.093 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK\" to destination register is 2.093 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns CLK 1 CLK PIN_14 15 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 15; CLK Node = 'CLK'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "" { CLK } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 31 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.792 ns) + CELL(0.574 ns) 2.093 ns pro_reg\[7\] 2 REG LC_X4_Y3_N4 2 " "Info: 2: + IC(0.792 ns) + CELL(0.574 ns) = 2.093 ns; Loc. = LC_X4_Y3_N4; Fanout = 2; REG Node = 'pro_reg\[7\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.366 ns" { CLK pro_reg[7] } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 42 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.301 ns 62.16 % " "Info: Total cell delay = 1.301 ns ( 62.16 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.792 ns 37.84 % " "Info: Total interconnect delay = 0.792 ns ( 37.84 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.093 ns" { CLK pro_reg[7] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout pro_reg[7] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 2.093 ns - Longest register " "Info: - Longest clock path from clock \"CLK\" to source register is 2.093 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns CLK 1 CLK PIN_14 15 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 15; CLK Node = 'CLK'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "" { CLK } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 31 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.792 ns) + CELL(0.574 ns) 2.093 ns m2_reg\[1\] 2 REG LC_X4_Y2_N4 16 " "Info: 2: + IC(0.792 ns) + CELL(0.574 ns) = 2.093 ns; Loc. = LC_X4_Y2_N4; Fanout = 16; REG Node = 'm2_reg\[1\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.366 ns" { CLK m2_reg[1] } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 37 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.301 ns 62.16 % " "Info: Total cell delay = 1.301 ns ( 62.16 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.792 ns 37.84 % " "Info: Total interconnect delay = 0.792 ns ( 37.84 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.093 ns" { CLK m2_reg[1] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout m2_reg[1] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.093 ns" { CLK pro_reg[7] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout pro_reg[7] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } } { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.093 ns" { CLK m2_reg[1] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout m2_reg[1] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.235 ns + " "Info: + Micro clock to output delay of source is 0.235 ns" {  } { { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 37 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.208 ns + " "Info: + Micro setup delay of destination is 0.208 ns" {  } { { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 42 -1 0 } }  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "10.709 ns" { m2_reg[1] pro_tmp~130 add~712 add~735 Select~1264 Select~1265 add~727 add~741 Select~1266 Select~1273 pro_reg[3]~518 pro_reg[4]~522 pro_reg[5]~526 pro_reg[7] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "10.709 ns" { m2_reg[1] pro_tmp~130 add~712 add~735 Select~1264 Select~1265 add~727 add~741 Select~1266 Select~1273 pro_reg[3]~518 pro_reg[4]~522 pro_reg[5]~526 pro_reg[7] } { 0.000ns 0.583ns 0.448ns 0.000ns 0.726ns 1.113ns 0.449ns 0.000ns 0.695ns 0.191ns 1.172ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.571ns 0.611ns 0.509ns 0.462ns 0.125ns 0.611ns 0.509ns 0.462ns 0.125ns 0.467ns 0.077ns 0.077ns 0.726ns } } } { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.093 ns" { CLK pro_reg[7] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout pro_reg[7] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } } { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.093 ns" { CLK m2_reg[1] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout m2_reg[1] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "m2_reg\[2\] M2\[2\] CLK 1.740 ns register " "Info: tsu for register \"m2_reg\[2\]\" (data pin = \"M2\[2\]\", clock pin = \"CLK\") is 1.740 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.625 ns + Longest pin register " "Info: + Longest pin to register delay is 3.625 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.708 ns) 0.708 ns M2\[2\] 1 PIN PIN_38 1 " "Info: 1: + IC(0.000 ns) + CELL(0.708 ns) = 0.708 ns; Loc. = PIN_38; Fanout = 1; PIN Node = 'M2\[2\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "" { M2[2] } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 33 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.742 ns) + CELL(0.175 ns) 3.625 ns m2_reg\[2\] 2 REG LC_X4_Y2_N2 15 " "Info: 2: + IC(2.742 ns) + CELL(0.175 ns) = 3.625 ns; Loc. = LC_X4_Y2_N2; Fanout = 15; REG Node = 'm2_reg\[2\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.917 ns" { M2[2] m2_reg[2] } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 37 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.883 ns 24.36 % " "Info: Total cell delay = 0.883 ns ( 24.36 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.742 ns 75.64 % " "Info: Total interconnect delay = 2.742 ns ( 75.64 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "3.625 ns" { M2[2] m2_reg[2] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.625 ns" { M2[2] M2[2]~combout m2_reg[2] } { 0.000ns 0.000ns 2.742ns } { 0.000ns 0.708ns 0.175ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.208 ns + " "Info: + Micro setup delay of destination is 0.208 ns" {  } { { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 37 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.093 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK\" to destination register is 2.093 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns CLK 1 CLK PIN_14 15 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 15; CLK Node = 'CLK'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "" { CLK } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 31 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.792 ns) + CELL(0.574 ns) 2.093 ns m2_reg\[2\] 2 REG LC_X4_Y2_N2 15 " "Info: 2: + IC(0.792 ns) + CELL(0.574 ns) = 2.093 ns; Loc. = LC_X4_Y2_N2; Fanout = 15; REG Node = 'm2_reg\[2\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "1.366 ns" { CLK m2_reg[2] } "NODE_NAME" } "" } } { "../../src/booth_com.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_com.v" 37 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.301 ns 62.16 % " "Info: Total cell delay = 1.301 ns ( 62.16 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.792 ns 37.84 % " "Info: Total interconnect delay = 0.792 ns ( 37.84 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.093 ns" { CLK m2_reg[2] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout m2_reg[2] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "3.625 ns" { M2[2] m2_reg[2] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.625 ns" { M2[2] M2[2]~combout m2_reg[2] } { 0.000ns 0.000ns 2.742ns } { 0.000ns 0.708ns 0.175ns } } } { "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com_cmp.qrpt" Compiler "booth_com" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_com/db/booth_com.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_com/" "" "2.093 ns" { CLK m2_reg[2] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout m2_reg[2] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0}

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