sel.fit

FPGA设计的时钟！很特别

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 10/15/2005 12:38:28      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "sel"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "f2hz"                         : INPUT_PIN  = 1      ;
    "q0"                           : OUTPUT_PIN = 28     ;
    "q1"                           : OUTPUT_PIN = 30     ;
    "q2"                           : OUTPUT_PIN = 29     ;
    ":5"                           : LOCATION   = LC8_C12;  -- temp2
    ":6"                           : LOCATION   = LC7_C12;  -- temp1
    ":7"                           : LOCATION   = LC2_C12;  -- temp0

END;

INTERNAL_INFO "sel"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4->LC8_C12,->LC7_C12,->LC2_C12|";
    LC8_C12 : LORAX = "1:MSW4R2C10,HHL44R2->OH12R2P29|";
    LC7_C12 : LORAX = "1:MSW6R2C11,G70R2->OH14R2P30|";
    LC2_C12 : LORAX = "1:MSW2R2C10,HHL0R2->OH10R2P28|";
	LC8_C12 : LORAX2 = "X, LC8_C12, LC7_C12, LC2_C12";
	LC7_C12 : LORAX2 = "X, LC8_C12, LC7_C12, LC2_C12";
	LC2_C12 : LORAX2 = "X, X, X, LC2_C12";
END;