min60.fit

FPGA设计的时钟！很特别

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 10/14/2005 20:15:21      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "min60"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "fin"                          : INPUT_PIN  = 1      ;
    "rst"                          : INPUT_PIN  = 2      ;
    "full"                         : OUTPUT_PIN = 64     ;
    "min00"                        : OUTPUT_PIN = 72     ;
    "min01"                        : OUTPUT_PIN = 73     ;
    "min02"                        : OUTPUT_PIN = 71     ;
    "min03"                        : OUTPUT_PIN = 69     ;
    "min10"                        : OUTPUT_PIN = 65     ;
    "min11"                        : OUTPUT_PIN = 66     ;
    "min12"                        : OUTPUT_PIN = 22     ;
    "min13"                        : OUTPUT_PIN = 67     ;
    "|LPM_ADD_SUB:162|addcore:adder|:55" : LOCATION   = LC6_B15;
    ":11"                          : LOCATION   = LC7_B15;
    ":13"                          : LOCATION   = LC8_A21;  -- min0_tmp3
    ":14"                          : LOCATION   = LC4_A21;  -- min0_tmp2
    ":15"                          : LOCATION   = LC1_A21;  -- min0_tmp1
    ":16"                          : LOCATION   = LC3_A21;  -- min0_tmp0
    ":17"                          : LOCATION   = LC1_B15;  -- min1_tmp3
    ":18"                          : LOCATION   = LC2_B15;  -- min1_tmp2
    ":19"                          : LOCATION   = LC3_B15;  -- min1_tmp1
    ":20"                          : LOCATION   = LC5_B15;  -- min1_tmp0
    ":83"                          : LOCATION   = LC6_A21;
    ":112"                         : LOCATION   = LC4_B15;

END;

INTERNAL_INFO "min60"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4->LC7_B15,->LC8_A21,->LC4_A21,->LC1_A21,->LC3_A21,->LC1_B15,->LC2_B15,->LC3_B15,->LC5_B15|";
    OD1P2   : LORAX = "1:FB1->LC7_B15,->LC8_A21,->LC4_A21,->LC1_A21,->LC3_A21,->LC1_B15,->LC2_B15,->LC3_B15,->LC5_B15|";
    LC7_B15 : LORAX = "1:MSW6R1C15,G74R1->OH6R1P64|";
    LC8_A21 : LORAX = "1:MSW7R0C21,HHR27R0->OH7R0P69|";
    LC4_A21 : LORAX = "1:MSW3R0C21,G33R0->OH3R0P71|";
    LC1_A21 : LORAX = "1:MSW0R0C20,HHR21R0->OH0R0P73|";
    LC3_A21 : LORAX = "1:MSW2R0C21,HHR14R0->OH2R0P72|";
    LC1_B15 : LORAX = "1:MSW0R1C14,HHR21R1->OH0R1P67|";
    LC2_B15 : LORAX = "1:MSW1R1C14,G28R1->OH9R1P22|";
    LC3_B15 : LORAX = "1:MSW2R1C15,HHR14R1->OH2R1P66|";
    LC5_B15 : LORAX = "1:MSW4R1C15,G60R1->OH4R1P65|";
    LC6_A21 : LORAX = "1:MSW5R0C20,V16C20,HHR45R1,PA4R1C14->LC7_B15,->LC1_B15,->LC2_B15,->LC3_B15,->LC5_B15|";
	LC6_B15 : LORAX2 = "X, X, LC3_B15, LC5_B15";
	LC7_B15 : LORAX2 = "X, X, LC4_B15, LC6_A21";
	LC8_A21 : LORAX2 = "LC8_A21, LC1_A21, LC4_A21, LC3_A21";
	LC4_A21 : LORAX2 = "LC4_A21, LC1_A21, LC6_A21, LC3_A21";
	LC1_A21 : LORAX2 = "X, LC1_A21, LC6_A21, LC3_A21";
	LC3_A21 : LORAX2 = "X, X, LC6_A21, LC3_A21";
	LC1_B15 : LORAX2 = "X, X, LC1_B15, LC6_A21";
	LC2_B15 : LORAX2 = "LC2_B15, LC4_B15, LC6_B15, LC6_A21";
	LC3_B15 : LORAX2 = "LC3_B15, LC4_B15, LC5_B15, LC6_A21";
	LC5_B15 : LORAX2 = "X, LC4_B15, LC5_B15, LC6_A21";
	LC6_A21 : LORAX2 = "LC8_A21, LC1_A21, LC4_A21, LC3_A21";
	LC4_B15 : LORAX2 = "LC1_B15, LC2_B15, LC3_B15, LC5_B15";
END;