xzq.vhdl

交通灯控制,在A和B方向各用数码管显示剩余的时间.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--  Uncomment the following lines to use the declarations that are
--  provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity XZQ is
    Port ( Q1 : in std_logic_vector(3 downto 0);
		 Q2 : in std_logic_vector(3 downto 0);
		 Q3 : in std_logic_vector(3 downto 0);
		 Q4 : in std_logic_vector(3 downto 0);
		 S  : in std_logic_vector(1 downto 0);
		 sel:out std_logic_vector(3 downto 0);
           Q  : out std_logic_vector(3 downto 0));
		
end XZQ;

architecture Behavioral of XZQ is
begin
  process(S)
  begin
	if S="00" then 
	   Q<=Q1 ;
	  sel<="1110";
	elsif S="01" then
	   Q<=Q2 ;
	   sel<="1101";
     elsif S="10" then 
	   Q<=Q3 ;
	   sel<="1011"
	elsif S="11" then
	   Q<=Q4;
	  sel<="0111";
	end if;
  end process;
end Behavioral;