xzq41.vhdl

交通灯控制,在A和B方向各用数码管显示剩余的时间.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--  Uncomment the following lines to use the declarations that are
--  provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity SZQ41 is
    Port ( Q1 : in std_logic_vector(3 downto 0);
		 Q2 : in std_logic_vector(3 downto 0);
		 Q3 : in std_logic_vector(3 downto 0);
		 Q4 : in std_logic_vector(3 downto 0);
		 S  : in std_logic_vector(1 downto 0);
		 en0,en1,en2,en3:out std_logic;
           Q  : out std_logic_vector(3 downto 0));
		
end SZQ41;

architecture Behavioral of SZQ41 is
begin
  process(S)
  begin
	if S="00" then 
	   Q<=Q1 ;
	  en0<='0';
	elsif S="01" then
	   Q<=Q2 ;
	   en1<='0';
     elsif S="10" then 
	   Q<=Q3 ;
	   en2<='0';
	elsif S="11" then
	   Q<=Q4;
	   en3<='0';
	end if;
  end process;
end Behavioral;