char_e_gen.v

ps/2键盘输入的字符在VGA上进行显示. 本示例是将ps/2键盘输入的字符在VGA上进行显示。在做此实验之前最好先学习PS2键盘接口。

////////////////////////////////////////////////////////////////////////////////
//                __     ___ _               ___ ____                         //
//                \ \   / (_) |__   ___  ___|_ _/ ___|                        //
//                 \ \ / /| | '_ \ / _ \/ __|| | |                            //
//                  \ V / | | |_) |  __/\__ \| | |___                         //
//                   \_/  |_|_.__/ \___||___/___\____|                        //
//                                                                            //
////////////////////////////////////////////////////////////////////////////////
// 	   Copyright (C) 2003-2006 VibesIC, Inc.   All rights reserved.           //
//----------------------------------------------------------------------------//
// This source code is provided by VibesIC, and be verified on VibesIC FPGA   //
// development kit. The source code may be used and distributed without       //
// restriction provided that this copyright statement is not removed from the //
// file and that any derivative work contains the original copyright notice   //
// and the associated disclaimer.                                             //
//----------------------------------------------------------------------------//
// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED     //
// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF       //
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE//
// AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,     //
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO,//
// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,OR PROFITS; //
// OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,   //
// WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR    //
// OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF     //
// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                                 //
//----------------------------------------------------------------------------//
// 本设计由威百仕( VibesIC )提供，并在其产品中验证通过，您可以在此基础上修改，//
// 复制并分发,但请您保留版权声明部分。我们并不承诺本设计可以用做商业产品，同时//
// 我们不保证设计的通用性。为了方便更新以及修改请保留设计的版本信息，并对自行 //
// 修改部分添加足够的注释。对设计如有其他建议,请到网站进行讨论。              //
//                                                                            //
////////////////////////////////////////////////////////////////////////////////
//  Company:       www.richic.com                                             //
//  Company bbs:   www.edacn.net                                              //
//  Engineer:      mail007 (Gavin.xue)                                        //
//                                                                            //
//  Target Device: XC3S400-PQ208                                              //
//  Tool versions: Simulation:    ModelSim SE 6.2a                            //
//                 Synthesis:     XST(ise8.1...sp3)                           //
//                 Place&Routing: ISE8.1...sp3                                //
//                 Others tools:  UltraEdit-32 12.10a                         //
//  Create Date:   2005-9-6 10:59                                             //
//  Description:                                                              //
//                                                                            //
//  LOG:                                                                      //
//       1. Revision 1.0 (Initial version)  2005-9-6 10:59    mail007         //
//                                                                            //
//       2. Revision 1.1  2006-12-28 10:32   alex_yang                        //
//          Updata ISE version from v6.3 to v8.1                              //
//          Modify for VX-SP306                                               //
////////////////////////////////////////////////////////////////////////////////

module char_e_gen(
                  clk,
                  rst_n,
                  rx_ascii,
                  rx_data_ready,
                  rx_read,
                  xpos,
                  ypos,
                  pixel
                  );

input           clk;
input           rst_n;
input   [7:0]   rx_ascii;
input           rx_data_ready;
input   [8:0]   xpos;
input   [8:0]   ypos;
output  reg     pixel;
output          rx_read;
    

endmodule