📄 watch.rpt
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- 5 - B 21 OR2 0 4 0 1 :1160
- 3 - B 20 OR2 s 0 4 0 1 ~1357~1
- 4 - B 14 OR2 s 1 2 0 10 ~1363~1
- 6 - B 15 OR2 s 0 2 0 2 ~1369~1
- 8 - B 14 OR2 s 0 4 0 1 ~1369~2
- 8 - B 15 OR2 s 0 4 0 1 ~1375~1
- 5 - B 15 OR2 s 0 4 0 1 ~1381~1
- 2 - B 16 OR2 s 0 3 0 2 ~1393~1
- 3 - B 14 OR2 s 0 4 0 1 ~1393~2
- 6 - B 16 OR2 s 0 4 0 1 ~1405~1
- 1 - B 14 OR2 s 0 3 0 9 ~1411~1
- 6 - B 13 OR2 s 0 2 0 2 ~1417~1
- 6 - B 17 OR2 s 0 4 0 1 ~1417~2
- 3 - B 13 OR2 s 0 4 0 1 ~1423~1
- 5 - B 17 OR2 s 0 4 0 1 ~1429~1
- 5 - B 04 OR2 ! 0 3 0 4 :2011
- 2 - B 24 OR2 0 3 0 1 :2076
- 1 - B 23 OR2 0 3 0 1 :2082
- 2 - B 19 OR2 0 3 0 1 :2088
- 2 - B 22 OR2 0 3 0 1 :2094
- 6 - B 11 OR2 ! 0 3 0 4 :2139
- 3 - B 24 OR2 0 3 0 1 :2204
- 4 - B 13 OR2 0 3 0 1 :2210
- 3 - B 19 OR2 0 3 0 1 :2216
- 3 - B 22 OR2 0 3 0 1 :2222
- 4 - B 11 AND2 0 3 0 4 :2267
- 4 - B 24 OR2 0 3 0 1 :2332
- 5 - B 13 OR2 0 3 0 1 :2338
- 4 - B 19 OR2 0 3 0 1 :2344
- 4 - B 22 OR2 0 3 0 1 :2350
- 2 - B 11 AND2 0 3 0 4 :2395
- 5 - B 24 OR2 0 3 0 1 :2460
- 7 - B 13 OR2 0 3 0 1 :2466
- 5 - B 19 OR2 0 3 0 1 :2472
- 5 - B 22 OR2 0 3 0 1 :2478
- 1 - B 04 AND2 0 3 0 4 :2523
- 6 - B 24 OR2 0 3 0 1 :2588
- 8 - B 13 OR2 0 3 0 1 :2594
- 6 - B 19 OR2 0 3 0 1 :2600
- 6 - B 22 OR2 0 3 0 1 :2606
- 5 - B 11 AND2 0 3 0 5 :2670
- 8 - C 24 AND2 s ! 0 2 0 4 ~2933~1
- 4 - C 24 AND2 0 3 0 5 :2933
- 5 - C 24 AND2 0 3 0 5 :3048
- 6 - C 21 AND2 0 4 0 3 :3163
- 1 - C 21 OR2 s ! 0 2 0 4 ~3227~1
- 8 - C 21 OR2 0 4 0 1 :3237
- 3 - C 23 OR2 0 3 0 1 :3245
- 6 - C 15 OR2 0 4 0 1 :3376
- 1 - C 24 OR2 ! 0 4 0 5 :3393
- 6 - C 23 OR2 0 4 0 1 :3463
- 7 - C 15 OR2 s 0 3 0 1 ~3485~1
- 5 - C 23 OR2 0 3 0 1 :3590
- 3 - C 21 AND2 0 4 0 2 :3623
- 4 - C 15 AND2 s 0 3 0 5 ~3685~1
- 8 - C 15 OR2 s 0 2 0 1 ~3685~2
- 5 - C 15 OR2 0 4 0 1 :3685
- 2 - C 15 OR2 s 0 4 0 5 ~3691~1
- 8 - C 23 OR2 0 3 0 1 :3691
- 7 - C 24 AND2 0 4 0 5 :3738
- 2 - C 21 OR2 0 4 0 1 :3929
- 6 - C 24 AND2 s 0 2 0 4 ~4030~1
- 1 - C 23 OR2 0 3 1 1 :4030
- 7 - C 23 OR2 0 3 1 1 :4036
- 2 - C 24 OR2 0 4 1 1 :4042
- 4 - C 23 OR2 0 4 1 1 :4048
- 2 - C 23 OR2 s 0 2 0 3 ~4054~1
- 4 - C 21 OR2 s 0 3 0 2 ~4054~2
- 5 - C 21 OR2 0 3 1 0 :4054
- 1 - C 15 OR2 0 3 1 0 :4060
- 3 - C 15 OR2 0 4 1 1 :4066
- 3 - C 24 OR2 s 0 4 0 2 ~4072~1
- 7 - C 21 OR2 0 3 1 0 :4072
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: f:\watch\watch.rpt
watch
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
B: 24/ 96( 25%) 6/ 48( 12%) 32/ 48( 66%) 0/16( 0%) 5/16( 31%) 0/16( 0%)
C: 6/ 96( 6%) 0/ 48( 0%) 18/ 48( 37%) 0/16( 0%) 8/16( 50%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
13: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: f:\watch\watch.rpt
watch
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 24 cp2
INPUT 13 cp3
Device-Specific Information: f:\watch\watch.rpt
watch
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 24 reset
Device-Specific Information: f:\watch\watch.rpt
watch
** EQUATIONS **
beginstop : INPUT;
cp2 : INPUT;
cp3 : INPUT;
reset : INPUT;
-- Node name is 'beginstop~1'
-- Equation name is 'beginstop~1', location is LC7_B16, type is buried.
-- synthesized logic cell
_LC7_B16 = LCELL( _EQ001);
_EQ001 = _LC1_B15 & !_LC1_B16 & !num50
# _LC1_B15 & !_LC1_B16 & !num51;
-- Node name is 'beginstop~2'
-- Equation name is 'beginstop~2', location is LC8_B16, type is buried.
-- synthesized logic cell
_LC8_B16 = LCELL( _EQ002);
_EQ002 = _LC2_B14 & num50 & num51 & !num52;
-- Node name is 'beginstop~3'
-- Equation name is 'beginstop~3', location is LC8_B17, type is buried.
-- synthesized logic cell
_LC8_B17 = LCELL( _EQ003);
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