tom08.fit.qmsg

SRAM 视频采集测试程序 读写时序控制 为解决时钟切换而做的测试程序

{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_LUT_IO_RAM_PACKING" "" "Info: Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "8 unused 3.30 3 5 0 " "Info: Number of I/O pins in group: 8 (unused VREF, 3.30 VCCIO, 3 input, 5 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 3 41 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 3 total pin(s) used --  41 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 42 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  42 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use unused 0 45 " "Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  45 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 0 42 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  42 pins available" {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "2.266 ns register register " "Info: Estimated most critical path is register to register delay of 2.266 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns clkadd\[0\] 1 REG LAB_X10_Y10 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X10_Y10; Fanout = 4; REG Node = 'clkadd\[0\]'" {  } { { "F:/tom08/db/tom08_cmp.qrpt" "" { Report "F:/tom08/db/tom08_cmp.qrpt" Compiler "tom08" "UNKNOWN" "V1" "F:/tom08/db/tom08.quartus_db" { Floorplan "F:/tom08/" "" "" { clkadd[0] } "NODE_NAME" } "" } } { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 21 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.298 ns) + CELL(0.442 ns) 0.740 ns clkadd\[2\]~46 2 COMB LAB_X10_Y10 1 " "Info: 2: + IC(0.298 ns) + CELL(0.442 ns) = 0.740 ns; Loc. = LAB_X10_Y10; Fanout = 1; COMB Node = 'clkadd\[2\]~46'" {  } { { "F:/tom08/db/tom08_cmp.qrpt" "" { Report "F:/tom08/db/tom08_cmp.qrpt" Compiler "tom08" "UNKNOWN" "V1" "F:/tom08/db/tom08.quartus_db" { Floorplan "F:/tom08/" "" "0.740 ns" { clkadd[0] clkadd[2]~46 } "NODE_NAME" } "" } } { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 21 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.659 ns) + CELL(0.867 ns) 2.266 ns clkadd\[2\] 3 REG LAB_X9_Y10 2 " "Info: 3: + IC(0.659 ns) + CELL(0.867 ns) = 2.266 ns; Loc. = LAB_X9_Y10; Fanout = 2; REG Node = 'clkadd\[2\]'" {  } { { "F:/tom08/db/tom08_cmp.qrpt" "" { Report "F:/tom08/db/tom08_cmp.qrpt" Compiler "tom08" "UNKNOWN" "V1" "F:/tom08/db/tom08.quartus_db" { Floorplan "F:/tom08/" "" "1.526 ns" { clkadd[2]~46 clkadd[2] } "NODE_NAME" } "" } } { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 21 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.309 ns 57.77 % " "Info: Total cell delay = 1.309 ns ( 57.77 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.957 ns 42.23 % " "Info: Total interconnect delay = 0.957 ns ( 42.23 % )" {  } {  } 0}  } { { "F:/tom08/db/tom08_cmp.qrpt" "" { Report "F:/tom08/db/tom08_cmp.qrpt" Compiler "tom08" "UNKNOWN" "V1" "F:/tom08/db/tom08.quartus_db" { Floorplan "F:/tom08/" "" "2.266 ns" { clkadd[0] clkadd[2]~46 clkadd[2] } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 0 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%." {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Info: Fitter routing operations ending: elapsed time is 00:00:01" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 29 17:18:13 2007 " "Info: Processing ended: Sun Apr 29 17:18:13 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Info: Elapsed time: 00:00:13" {  } {  } 0}  } {  } 0}