tom08.map.qmsg

SRAM 视频采集测试程序 读写时序控制 为解决时钟切换而做的测试程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version " "Info: Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 29 17:17:53 2007 " "Info: Processing started: Sun Apr 29 17:17:53 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off tom08 -c tom08 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off tom08 -c tom08" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "tom08.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file tom08.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 tom08-behav " "Info: Found design unit 1: tom08-behav" {  } { { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 18 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 tom08 " "Info: Found entity 1: tom08" {  } { { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "tom08 " "Info: Elaborating entity \"tom08\" for the top level hierarchy" {  } {  } 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "OE~0 High " "Info: Power-up level of register \"OE~0\" is not specified -- using power-up level of High to minimize register" {  } { { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 10 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "OE~0 data_in VCC " "Warning: Reduced register \"OE~0\" with stuck data_in port to stuck value VCC" {  } { { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 10 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "WE~0 data_in GND " "Warning: Reduced register \"WE~0\" with stuck data_in port to stuck value GND" {  } { { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 11 -1 0 } }  } 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT" "\|tom08\|state 3 0 " "Info: State machine \"\|tom08\|state\" contains 3 states and 0 state bits" {  } { { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 20 -1 0 } }  } 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|tom08\|state " "Info: Selected Auto state machine encoding method for state machine \"\|tom08\|state\"" {  } { { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 20 -1 0 } }  } 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|tom08\|state " "Info: Encoding result for state machine \"\|tom08\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "3 " "Info: Completed encoding using 3 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.s2 " "Info: Encoded state bit \"state.s2\"" {  } {  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.s1 " "Info: Encoded state bit \"state.s1\"" {  } {  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state.s0 " "Info: Encoded state bit \"state.s0\"" {  } {  } 0}  } {  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|tom08\|state.s0 000 " "Info: State \"\|tom08\|state.s0\" uses code string \"000\"" {  } {  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|tom08\|state.s1 011 " "Info: State \"\|tom08\|state.s1\" uses code string \"011\"" {  } {  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|tom08\|state.s2 101 " "Info: State \"\|tom08\|state.s2\" uses code string \"101\"" {  } {  } 0}  } { { "tom08.vhd" "" { Text "F:/tom08/tom08.vhd" 20 -1 0 } }  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "32 " "Info: Implemented 32 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "4 " "Info: Implemented 4 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "5 " "Info: Implemented 5 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "23 " "Info: Implemented 23 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 29 17:17:58 2007 " "Info: Processing ended: Sun Apr 29 17:17:58 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0}  } {  } 0}