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📄 tom08.map.eqn

📁 SRAM 视频采集测试程序 读写时序控制 为解决时钟切换而做的测试程序
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L82Q is OE~reg0
--operation mode is normal

A1L82Q_lut_out = VCC;
A1L82Q = DFFEAS(A1L82Q_lut_out, A1L62, state.s0, , , VCC, state.s1, , );


--A1L53Q is WE~reg0
--operation mode is normal

A1L53Q_lut_out = VCC;
A1L53Q = DFFEAS(A1L53Q_lut_out, A1L62, !state.s1, , , VCC, !state.s0, , );


--A1L3Q is address[0]~reg0
--operation mode is normal

A1L3Q_lut_out = clkadd[0];
A1L3Q = DFFEAS(A1L3Q_lut_out, A1L62, VCC, , , A1L01Q, !state.s2, , );


--A1L5Q is address[1]~reg0
--operation mode is normal

A1L5Q_lut_out = clkadd[1];
A1L5Q = DFFEAS(A1L5Q_lut_out, A1L62, VCC, , , A1L9Q, !state.s2, , );


--A1L7Q is address[2]~reg0
--operation mode is normal

A1L7Q_lut_out = clkadd[2];
A1L7Q = DFFEAS(A1L7Q_lut_out, A1L62, VCC, , , A1L8Q, !state.s2, , );


--state.s2 is state.s2
--operation mode is normal

state.s2_lut_out = state.s2 # startbutton & !state.s0 & !displaybutton;
state.s2 = DFFEAS(state.s2_lut_out, clk, !A1L92, , , , , , );


--state.s1 is state.s1
--operation mode is normal

state.s1_lut_out = state.s1 # displaybutton & !state.s0 & !startbutton;
state.s1 = DFFEAS(state.s1_lut_out, clk, !A1L92, , , , , , );


--A1L62 is muxclk~22
--operation mode is normal

A1L62 = state.s1 & LLC # !state.s1 & (state.s2 & clk);


--state.s0 is state.s0
--operation mode is normal

state.s0_lut_out = state.s0 # displaybutton $ startbutton;
state.s0 = DFFEAS(state.s0_lut_out, clk, !A1L92, , , , , , );


--clkadd[0] is clkadd[0]
--operation mode is normal

clkadd[0]_lut_out = !clkadd[0];
clkadd[0] = DFFEAS(clkadd[0]_lut_out, A1L62, VCC, , state.s2, , , , );


--A1L01Q is address~2
--operation mode is normal

A1L01Q_lut_out = LLCadd[0];
A1L01Q = DFFEAS(A1L01Q_lut_out, A1L62, VCC, , , , , , );


--clkadd[1] is clkadd[1]
--operation mode is normal

clkadd[1]_lut_out = !clkadd[1];
clkadd[1] = DFFEAS(clkadd[1]_lut_out, A1L62, VCC, , A1L51, , , , );


--A1L9Q is address~1
--operation mode is normal

A1L9Q_lut_out = LLCadd[1];
A1L9Q = DFFEAS(A1L9Q_lut_out, A1L62, VCC, , , , , , );


--clkadd[2] is clkadd[2]
--operation mode is normal

clkadd[2]_lut_out = !clkadd[2];
clkadd[2] = DFFEAS(clkadd[2]_lut_out, A1L62, VCC, , A1L71, , , , );


--A1L8Q is address~0
--operation mode is normal

A1L8Q_lut_out = LLCadd[2];
A1L8Q = DFFEAS(A1L8Q_lut_out, A1L62, VCC, , , , , , );


--A1L92 is process0~22
--operation mode is normal

A1L92 = displaybutton & startbutton;


--LLCadd[0] is LLCadd[0]
--operation mode is normal

LLCadd[0]_lut_out = !LLCadd[0];
LLCadd[0] = DFFEAS(LLCadd[0]_lut_out, A1L62, VCC, , state.s1, , , , );


--A1L51 is clkadd[1]~45
--operation mode is normal

A1L51 = state.s2 & clkadd[0];


--LLCadd[1] is LLCadd[1]
--operation mode is normal

LLCadd[1]_lut_out = !LLCadd[1];
LLCadd[1] = DFFEAS(LLCadd[1]_lut_out, A1L62, VCC, , A1L32, , , , );


--A1L71 is clkadd[2]~46
--operation mode is normal

A1L71 = state.s2 & clkadd[0] & clkadd[1];


--LLCadd[2] is LLCadd[2]
--operation mode is normal

LLCadd[2]_lut_out = !LLCadd[2];
LLCadd[2] = DFFEAS(LLCadd[2]_lut_out, A1L62, VCC, , A1L52, , , , );


--A1L32 is LLCadd[1]~45
--operation mode is normal

A1L32 = state.s1 & LLCadd[0];


--A1L52 is LLCadd[2]~46
--operation mode is normal

A1L52 = state.s1 & LLCadd[0] & LLCadd[1];


--LLC is LLC
--operation mode is input

LLC = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--startbutton is startbutton
--operation mode is input

startbutton = INPUT();


--displaybutton is displaybutton
--operation mode is input

displaybutton = INPUT();


--OE is OE
--operation mode is output

OE = OUTPUT(A1L82Q);


--WE is WE
--operation mode is output

WE = OUTPUT(A1L53Q);


--address[0] is address[0]
--operation mode is output

address[0] = OUTPUT(A1L3Q);


--address[1] is address[1]
--operation mode is output

address[1] = OUTPUT(A1L5Q);


--address[2] is address[2]
--operation mode is output

address[2] = OUTPUT(A1L7Q);


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