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📄 tom08.fit.eqn

📁 SRAM 视频采集测试程序 读写时序控制 为解决时钟切换而做的测试程序
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L82Q is OE~reg0 at LC_X44_Y1_N2
--operation mode is normal

A1L82Q_lut_out = VCC;
A1L82Q = DFFEAS(A1L82Q_lut_out, GLOBAL(A1L62), GLOBAL(state.s0), , , VCC, GLOBAL(state.s1), , );


--A1L53Q is WE~reg0 at LC_X28_Y1_N2
--operation mode is normal

A1L53Q_lut_out = VCC;
A1L53Q = DFFEAS(A1L53Q_lut_out, GLOBAL(A1L62), !GLOBAL(state.s1), , , VCC, !GLOBAL(state.s0), , );


--A1L3Q is address[0]~reg0 at LC_X8_Y10_N4
--operation mode is normal

A1L3Q_lut_out = clkadd[0];
A1L3Q = DFFEAS(A1L3Q_lut_out, GLOBAL(A1L62), VCC, , , A1L01Q, !GLOBAL(state.s2), , );


--A1L5Q is address[1]~reg0 at LC_X10_Y12_N2
--operation mode is normal

A1L5Q_lut_out = clkadd[1];
A1L5Q = DFFEAS(A1L5Q_lut_out, GLOBAL(A1L62), VCC, , , A1L9Q, !GLOBAL(state.s2), , );


--A1L7Q is address[2]~reg0 at LC_X9_Y10_N4
--operation mode is normal

A1L7Q_lut_out = clkadd[2];
A1L7Q = DFFEAS(A1L7Q_lut_out, GLOBAL(A1L62), VCC, , , A1L8Q, !GLOBAL(state.s2), , );


--state.s2 is state.s2 at LC_X9_Y13_N8
--operation mode is normal

state.s2_lut_out = state.s2 # !state.s0 & startbutton & !displaybutton;
state.s2 = DFFEAS(state.s2_lut_out, GLOBAL(clk), !GLOBAL(A1L92), , , , , , );


--state.s1 is state.s1 at LC_X9_Y13_N5
--operation mode is normal

state.s1_lut_out = state.s1 # !state.s0 & !startbutton & displaybutton;
state.s1 = DFFEAS(state.s1_lut_out, GLOBAL(clk), !GLOBAL(A1L92), , , , , , );


--A1L62 is muxclk~22 at LC_X8_Y13_N2
--operation mode is normal

A1L62 = state.s1 & LLC # !state.s1 & (clk & state.s2);


--state.s0 is state.s0 at LC_X9_Y13_N2
--operation mode is normal

state.s0_lut_out = state.s0 # startbutton $ displaybutton;
state.s0 = DFFEAS(state.s0_lut_out, GLOBAL(clk), !GLOBAL(A1L92), , , , , , );


--clkadd[0] is clkadd[0] at LC_X10_Y10_N5
--operation mode is normal

clkadd[0]_lut_out = !clkadd[0];
clkadd[0] = DFFEAS(clkadd[0]_lut_out, GLOBAL(A1L62), VCC, , state.s2, , , , );


--A1L01Q is address~2 at LC_X8_Y10_N2
--operation mode is normal

A1L01Q_lut_out = GND;
A1L01Q = DFFEAS(A1L01Q_lut_out, GLOBAL(A1L62), VCC, , , LLCadd[0], , , VCC);


--clkadd[1] is clkadd[1] at LC_X10_Y10_N6
--operation mode is normal

clkadd[1]_lut_out = !clkadd[1];
clkadd[1] = DFFEAS(clkadd[1]_lut_out, GLOBAL(A1L62), VCC, , A1L51, , , , );


--A1L9Q is address~1 at LC_X10_Y12_N4
--operation mode is normal

A1L9Q_lut_out = LLCadd[1];
A1L9Q = DFFEAS(A1L9Q_lut_out, GLOBAL(A1L62), VCC, , , , , , );


--clkadd[2] is clkadd[2] at LC_X9_Y10_N5
--operation mode is normal

clkadd[2]_lut_out = !clkadd[2];
clkadd[2] = DFFEAS(clkadd[2]_lut_out, GLOBAL(A1L62), VCC, , A1L71, , , , );


--A1L8Q is address~0 at LC_X9_Y10_N2
--operation mode is normal

A1L8Q_lut_out = GND;
A1L8Q = DFFEAS(A1L8Q_lut_out, GLOBAL(A1L62), VCC, , , LLCadd[2], , , VCC);


--A1L92 is process0~22 at LC_X9_Y13_N6
--operation mode is normal

A1L92 = startbutton & displaybutton;


--LLCadd[0] is LLCadd[0] at LC_X9_Y12_N6
--operation mode is normal

LLCadd[0]_lut_out = !LLCadd[0];
LLCadd[0] = DFFEAS(LLCadd[0]_lut_out, GLOBAL(A1L62), VCC, , state.s1, , , , );


--A1L51 is clkadd[1]~45 at LC_X10_Y10_N2
--operation mode is normal

A1L51 = state.s2 & (clkadd[0]);


--LLCadd[1] is LLCadd[1] at LC_X9_Y12_N4
--operation mode is normal

LLCadd[1]_lut_out = !LLCadd[1];
LLCadd[1] = DFFEAS(LLCadd[1]_lut_out, GLOBAL(A1L62), VCC, , A1L32, , , , );


--A1L71 is clkadd[2]~46 at LC_X10_Y10_N4
--operation mode is normal

A1L71 = clkadd[1] & clkadd[0] & (state.s2);


--LLCadd[2] is LLCadd[2] at LC_X8_Y12_N2
--operation mode is normal

LLCadd[2]_lut_out = !LLCadd[2];
LLCadd[2] = DFFEAS(LLCadd[2]_lut_out, GLOBAL(A1L62), VCC, , A1L52, , , , );


--A1L32 is LLCadd[1]~45 at LC_X9_Y12_N5
--operation mode is normal

A1L32 = state.s1 & LLCadd[0];


--A1L52 is LLCadd[2]~46 at LC_X9_Y12_N2
--operation mode is normal

A1L52 = LLCadd[0] & LLCadd[1] & state.s1;


--LLC is LLC at PIN_38
--operation mode is input

LLC = INPUT();


--clk is clk at PIN_29
--operation mode is input

clk = INPUT();


--startbutton is startbutton at PIN_23
--operation mode is input

startbutton = INPUT();


--displaybutton is displaybutton at PIN_39
--operation mode is input

displaybutton = INPUT();


--OE is OE at PIN_106
--operation mode is output

OE = OUTPUT(A1L82Q);


--WE is WE at PIN_95
--operation mode is output

WE = OUTPUT(A1L53Q);


--address[0] is address[0] at PIN_73
--operation mode is output

address[0] = OUTPUT(A1L3Q);


--address[1] is address[1] at PIN_77
--operation mode is output

address[1] = OUTPUT(A1L5Q);


--address[2] is address[2] at PIN_75
--operation mode is output

address[2] = OUTPUT(A1L7Q);




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