gencrc1.vhd

并口硬盘标准PATA6的CRC效验码的vhdl代码

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.STD_LOGIC_UNSIGNED.all;


entity GenCrc1 is
port(  
     
  Reset :in std_logic;
  IClk:in std_logic;
  IDiskData:in std_logic_vector(15 DOWNTO 0);
   OCRCOut:out std_logic_vector(15 DOWNTO 0)
 ); end   ;

architecture GenCrc1_arc of GenCrc1 is
signal sCRCIN1: std_logic_vector(15 DOWNTO 0);
signal sFData1: std_logic_vector(16 DOWNTO 1);
signal sCRCOUT1: std_logic_vector(15 DOWNTO 0);
signal sIData1: std_logic_vector(15 DOWNTO 0);
signal sIData0: std_logic_vector(15 DOWNTO 0);

signal sFData2: std_logic_vector(16 DOWNTO 1);
signal sCRCOUT2: std_logic_vector(15 DOWNTO 0);
signal sIData2: std_logic_vector(15 DOWNTO 0);
signal sFirst: std_logic;

signal sCRCOUT: std_logic_vector(15 DOWNTO 0);
component GenCrcComBin is
port(  
     
  ICRCIN :in std_logic_vector(15 DOWNTO 0);
  --IFData:in std_logic_vector(16 DOWNTO 1);
  IDiskData:in std_logic_vector(15 DOWNTO 0);
  --OFData:out std_logic_vector(16 DOWNTO 1);
  OCRCOut:out std_logic_vector(15 DOWNTO 0)
 ); end component;




begin
OCRCOut <= sCRCOUT2;
process(IClk,Reset)
begin
  if( Reset ='1' ) then  --局部时钟上升沿
    sFirst <= '1';
    --sCRCOUT <= x"4aba";
  elsif( IClk'event and IClk = '1' ) then  --局部时钟上升沿 and Clk='1'
    sFirst <= '0';
    if( sFirst = '1') then
      sCRCOUT <= x"4aba";
    else
      sCRCOUT <= sCRCOut2;
    end if;
  end if;
end process;


process(IClk)
begin

  if( IClk'event and IClk = '0' ) then  --局部时钟上升沿 and Clk='1'
    sIData0 <= IDiskData;
  end if;
end process;

process(IClk)
begin

  if( IClk'event and IClk = '1' ) then  --局部时钟上升沿 and Clk='1'
    sIData2 <= IDiskData;
    sIData1 <= sIData0;
  end if;
end process;

 
u1:GenCrcComBin--
port map(

  ICRCIN  => sCRCOUT,
  --IFData => sFData1,
  IDiskData => sIData1,
  --OFData => sFData1,
  OCRCOut => sCRCOut1
);

u2:GenCrcComBin--
port map(

  ICRCIN  => sCRCOut1,
  --IFData => sFData2,
  IDiskData => sIData2,
  --OFData => sFData2,
  OCRCOut => sCRCOut2
);
end  GenCrc1_arc;