iis.c

优龙科技公司自带的一个源码

#include "..\inc\44b.h"
#include "..\inc\44blib.h"
#include "..\inc\def.h"
#include "..\inc\iis.h"

void _WrL3Addr(U8 data);
void _WrL3Data(U8 data,int halt);
void __irq BDMA0_Done(void);
void __irq TR_Done(void);
void __irq RxInt(void);

#define L3D (0x200)
#define L3M (0x40)
#define L3C (0x80)

#define TESTSIZE 2000000//1000//100
//for test
//static short int Buf[TESTSIZE];
//for down
unsigned char *Buf,*_temp;

volatile unsigned int size=0;

void Test_Iis(void)
{
    unsigned int i,j,save_A,save_C,save_E,save_G,save_PC,save_PE,save_PG;

    ChangePllValue(0x69,0x17,0x0);	//MCLK=45.1584MHz <-- 5.6448MHz*8
    Uart_Init(45200000,115200);
    Uart_Printf("[IIS test]\n");
    
    save_A=rPCONA;//L3DATA
    save_C=rPCONC;//IIS port
    save_E=rPCONE;//CODEC clk
    save_G=rPCONG;//L3CLK,L3MOD
    save_PC=rPUPC;
    save_PE=rPUPE;
    save_PG=rPUPG;

#if (BUSWIDTH==32)
    Uart_Printf("IIS test should be configured 16bit data bus\n");
    return;
#else //BUSWIDTH=16
    rPCONC |=0xff;	
    rPUPC |= 0xf;
#endif

    rPCONE=(rPCONE&0xffff)+(2<<16); //PE:CODECLK
    pISR_BDMA0=(unsigned)BDMA0_Done;

    rINTMSK=~(BIT_GLOBAL|BIT_BDMA0|BIT_URXD0);

    /****** Tx DATA Initialize *****/
//for test
/*    rNCACHBE0= ((int)Buf>>12) + ( (((int)Buf>>12) +0x100)<<16 );
    Uart_Printf("rNCACHBE0=0x%x\n",rNCACHBE0);
    for(i=0;i<TESTSIZE/2 ;i+=2)
    {
	Buf[i]=i*30;
	Buf[i+1]=i*30;
    }
    for(i=TESTSIZE/2;i<TESTSIZE;i+=2)
    {
	Buf[i]=(TESTSIZE-i)*30;
	Buf[i+1]=(TESTSIZE-i)*30;
    }
*/
///////////////////////////////////////////////////////////////////////////////////
//for down
    pISR_URXD0=(unsigned)RxInt;
    Buf=(unsigned char *)malloc(TESTSIZE);
    rNCACHBE0= ((int)Buf>>12) + ( (((int)Buf>>12) +0x200)<<16 );//non-cachable 2MB
    Uart_Printf("rNCACHBE0=0x%x\n",rNCACHBE0);
    _temp=Buf;

    Uart_Printf("Download the PCM(no ADPCM) wave file by wkcom2(with header)!!\n");

    while(((unsigned int)_temp-(unsigned int)Buf)<4)
    {
	Led_Display(0xf);
	Delay(1500);
	Led_Display(0x0);
	Delay(1500);
    }
    size=*(Buf) | *(Buf+1)<<8 | *(Buf+2)<<16 | *(Buf+3)<<24;
    Uart_Printf("\nNow, Downloading... [FILESIZE:%7d(      0)",size);
    while(((unsigned int)_temp-(unsigned int)Buf)<size)
    	Uart_Printf("\b\b\b\b\b\b\b\b%7d)",(unsigned int)_temp-(unsigned int)Buf);
    Uart_Printf("\b\b\b\b\b\b\b\b%7d)\n",(unsigned int)_temp-(unsigned int)Buf);

    rINTMSK |=BIT_URXD0;

    size=*(Buf+0x2c) | *(Buf+0x2d)<<8 | *(Buf+0x2e)<<16 | *(Buf+0x2f)<<24;
    size=(size>>1)<<1;
    Uart_Printf("sample size=0x%x\n",size/2);

    Uart_Printf("\n[]Now play the wave file\n");

///////////////////////////////////////////////////////////////////////////////////
    Init1341();

//    for(i=4;i<300;i++)
//	Uart_Printf("%02x,",*(Buf+i));

    /****** BDMA0 Initialize ******/
//for down
    rBDISRC0=(1<<30)+(1<<28)+(int)(Buf+0x30);	//Half word,inc,Buf
//    rBDISRC0=(1<<30)+(1<<28)+(int)(Buf+4);	//Half word,inc,Buf
//for test
//    rBDISRC0=(1<<30)+(1<<28)+(int)(Buf);	//Half word,inc,Buf
    rBDIDES0=(1<<30)+(3<<28)+((int)IISFIF);	//M2IO,fix,IISFIF
//for down
    rBDICNT0=(1<<30)+(1<<26)+(3<<22)+(1<<21)+(0<<20)+size;
    rBDICNT0 |= (1<<20);//enable
//for test
//    rBDICNT0=(1<<30)+(1<<26)+(3<<22)+(1<<21)+(1<<20)+TESTSIZE*2;
    //iis,reserve,done_int,auto-reload/start,DMA enable,COUNT
    rBDCON0 = 0x0<<2;
  
    /****** IIS Initialize ******/
    rIISCON=0x22;	//Tx DMA enable,Rx idle,prescaler enable
    rIISMOD=0x89;	//Master,Tx,L-ch=low,iis,16bit ch.,codeclk=256fs,lrck=32fs
//    rIISPSR=0x11;	//Prescaler_A/B enable, value=1
    rIISPSR=0x33;	//Prescaler_A/B enable, value=3
    rIISFCON=0xa00;	//Tx/Rx DMA,Tx/Rx FIFO --> start piling....

    Uart_Printf("Push any key to exit!!!\n");
    /****** IIS Tx Start ******/
    rIISCON |=0x1;
    while(!Uart_GetKey());

    /****** IIS Tx Stop ******/
    rIISCON=0x0;    //IIS stop
    rBDICNT0=0x0;   //BDMA stop
//for down
    free(Buf);
    Cache_Flush();
    rNCACHBE0=0x0;
    size=0;

    rPCONA=save_A;
    rPCONC=save_C;
    rPCONE=save_E;
    rPCONG=save_G;
    rPUPC=save_PC;
    rPUPE=save_PE;
    rPUPG=save_PG;

    rINTMSK=BIT_GLOBAL;
    ChangePllValue(0x34,0x3,0x1);//Fin=10MHz, Fout=60MHz
    Uart_Init(0,115200);
}

void Init1341(void)
{
    /****** Port Initialize ******/
    rPCONA = 0x1ff;	//PA9(out):L3D
    rPCONG = 0x5000;	//PG6:L3M, PG7:L3C
    rPUPG  |= 0xc0;	//disable(pull-up)

    rPDATG = L3M|L3C;	//L3M=H(start condition)
    			//L3C=H(start condition)

    /****** L3 Interface ******/
    _WrL3Addr(0x14+2);	//status (000101xx+10)
#ifdef FS441KHZ
    _WrL3Data(0x60,0); //0,1,10,000,0 reset,256fs,no DCfilter,iis
#else
    _WrL3Data(0x40,0); //0,1,00,000,0 reset,512fs,no DCfilter,iis
#endif

    _WrL3Addr(0x14+2); //status (000101xx+10)
#ifdef FS441KHZ
    _WrL3Data(0x20,0); //0,0,10,000,0 no reset,256fs,no DCfilter,iis
#else
    _WrL3Data(0x00,0); //0,0,00,000,0 no reset,512fs,no DCfilter,iis
#endif
    
    _WrL3Addr(0x14+2); //status (000101xx+10)
    _WrL3Data(0x83,0);
    //1,0,0,0,0,0,11 OGS=0,IGS=0,ADC_NI,DAC_NI,sngl speed,AonDon
}


void _WrL3Addr(U8 data)
{	
    U32 vPdata = 0x0;	//L3D=L	
    U32 vPdatg = 0x0;	//L3M=L(in address mode)/L3C=L
    S32 i,j;

    rPDATG = vPdatg;	//L3M=L
    rPDATG |= L3C;	//L3C=H

    for(j=0;j<4;j++);		//tsu(L3) > 190ns

    //PA9:L3D PG6:L3M PG7:L3C
    for(i=0;i<8;i++)		
    {
	if(data&0x1)//if data bit is 'H'
	{
	    rPDATG = vPdatg;	//L3C=L
	    rPDATA = L3D;	//L3D=H		    
	    for(j=0;j<4;j++);	//tcy(L3) > 500ns
	    rPDATG = L3C;	//L3C=H
	    rPDATA = L3D;	//L3D=H
	    for(j=0;j<4;j++);	//tcy(L3) > 500ns
	}
	else		//if data bit is 'L'
	{
	    rPDATG=vPdatg;	//L3C=L
	    rPDATA=vPdata;	//L3D=L
	    for(j=0;j<4;j++);	//tcy(L3) > 500ns
	    rPDATG=L3C;		//L3C=H
	    rPDATA=vPdata;	//L3D=L
	    for(j=0;j<4;j++);	//tcy(L3) > 500ns
	}
	data >>=1;
    }
    rPDATG=L3C|L3M;	//L3M=H,L3C=H
}


void _WrL3Data(U8 data,int halt)
{
    U32 vPdata = 0x0;   //L3D=L
    U32 vPdatg = 0x0;	//L3M/L3C=L
    S32 i,j;
    if(halt)
    {
        rPDATG=L3C;	    //L3C=H(while tstp, L3 interface halt condition)
        for(j=0;j<4;j++);   //tstp(L3) > 190ns
    }
    rPDATG=L3C|L3M;	    //L3M=H(in data transfer mode)	
    for(j=0;j<4;j++);	    //tsu(L3)D > 190ns

    //PA9:L3MODE PG6:L3DATA PG7:L3CLOCK
    for(i=0;i<8;i++)
    {
        if(data&0x1)	//if data bit is 'H'
        {
	    rPDATG=L3M;		//L3C=L
            rPDATA=L3D;		//L3D=H
            for(j=0;j<4;j++);	//tcy(L3) > 500ns
            rPDATG=L3C|L3M;	//L3C=H,L3D=H
	    rPDATA=L3D;
            for(j=0;j<4;j++);	//tcy(L3) > 500ns
        }
        else		//if data bit is 'L'
        {
            rPDATG=L3M;		//L3C=L
	    rPDATA=vPdatg;	//L3D=L
            for(j=0;j<4;j++);	//tcy(L3) > 500ns
            rPDATG=L3C|L3M;	//L3C=H
	    rPDATA=vPdatg;	//L3D=L
            for(j=0;j<4;j++);	//tcy(L3) > 500ns
        }
        data>>=1;
    }
    rPDATG=L3C|L3M;	//L3M=H,L3C=H
}


void __irq BDMA0_Done(void)
{
    rI_ISPC=BIT_BDMA0;	//clear pending bit
    WrUTXH0('.');
}


void __irq RxInt(void)
{
    rI_ISPC=BIT_URXD0 ;	//clear pending bits
    *_temp++=RdURXH0();
}

volatile int Tx_Done;
volatile int Rx_Done;

void Iis_Tx(void)
{
    unsigned int  i, save_conC, save_pupC;
    unsigned short *txdata;

    Tx_Done=0;
    Uart_TxEmpty(0);
    ChangePllValue(0x69,0x17,0x0);	//10MHz --> MCLK=45.1584MHz <-- 5.6448MHz*8
    Uart_Init(45200000,115200);
    Uart_Printf("[IIS Slave Tx test]\n");
    
    save_conC=rPCONC;
    save_pupC=rPUPC;

    rPCONC |=0xff;//IIS port	
    rPUPC |= 0xf;

    pISR_BDMA0=(unsigned)TR_Done;
    rINTMSK=~(BIT_GLOBAL|BIT_BDMA0);

    /****** Tx DATA initialize ******/
    txdata=(unsigned short *)malloc(0x10000);
    for(i=0;i<0x10000;i++)
	*(txdata+i)=i;
    
    rNCACHBE0= ((int)txdata>>12) + ( (((int)txdata>>12) +0x20)<<16 );//non-cachable 65KB*2

    /****** BDMA0 Initialize ******/
    rBDISRC0=(1<<30)+(1<<28)+(int)(txdata);	//Half word,inc,Buf
    rBDIDES0=(1<<30)+(3<<28)+((int)IISFIF);	//M2IO,fix,IISFIF
    rBDICNT0=(1<<30)+(1<<26)+(3<<22)+(0<<21)+(0<<20)+0x10000*2;
    rBDICNT0 |= (1<<20);//enable
    //iis,reserved,end_int,1_tx,DMA enable,COUNT
    rBDCON0 = 0x0<<2;
  
    /****** IIS Initialize ******/
    rIISCON=0x22;	//Tx DMA enable,Rx idle,prescaler enable
    rIISMOD=0x189;	//Master,Tx,L-ch=low,iis,16bit ch.,codeclk=256fs,lrck=32fs
    rIISPSR=0x33;	//Prescaler_A/B enable, value=3
    rIISFCON=0xa00;	//Tx/Rx DMA,Tx/Rx FIFO --> start piling....

    /****** Tx start ******/
    rIISCON |=0x1;
    
    while(!Tx_Done);

    /****** Tx Stop(Slave) ******/
    Delay(10);
    rIISCON=0x0;    //IIS stop
    rIISFCON=0x0;   //for FIFO flush
    rBDICNT0=0x0;   //BDMA stop
    Uart_Printf("\nTx End...\n");
    Uart_Printf("Last 256bytes in 65KB transferred data\n");
    for(i=0;i<0x100;i++)
	Uart_Printf("%04x,",*(txdata+0xff00+i));

    free(txdata);
    Cache_Flush();
    rNCACHBE0=0x0;

    rPCONC=save_conC;
    rPUPC=save_pupC;

    rINTMSK=BIT_GLOBAL;
    ChangePllValue(0x34,0x3,0x1);//Fin=10MHz, Fout=60MHz
    Uart_Init(0,115200);


}
  
void __irq TR_Done(void)
{
    rI_ISPC=BIT_BDMA0;	//clear pending bit
    Rx_Done=1;
    Tx_Done=1;
    //WrUTXH0('.');
}

void Iis_Rx(void)
{
    unsigned int i, j, save_conC,save_pupC;
    unsigned short *rxdata;

    Rx_Done=0;
    Uart_TxEmpty(0);
    ChangePllValue(0x69,0x17,0x0);	//10MHz --> MCLK=45.1584MHz <-- 5.6448MHz*8
    Uart_Init(45200000,115200);
    Uart_Printf("[IIS Master Rx test]\n");
    
    save_conC=rPCONC;
    save_pupC=rPUPC;
    
    rPCONC |=0xff;//IIS port	
    rPUPC |= 0xf;

    pISR_BDMA0=(unsigned)TR_Done;
    rINTMSK=~(BIT_GLOBAL|BIT_BDMA0);

    /****** Rx Buf initialize ******/
    rxdata=(unsigned short *)malloc(0x10000);
    //Uart_Printf("Receive addr=0x%x\n",rxdata);
    for(i=0;i<0x10000;i++)
	*(rxdata+i)=0;

    rNCACHBE0= ((int)rxdata>>12) + ( (((int)rxdata>>12) +0x20)<<16 );//non-cachable 65KB*2

    /****** BDMA0 Initialize ******/
    rBDISRC0=(1<<30)+(3<<28)+((int)IISFIF);	//Half word,fix,IISFIF
    rBDIDES0=(2<<30)+(1<<28)+(int)(rxdata);	//IO2M,increment,rxdata
    rBDICNT0=(1<<30)+(1<<26)+(3<<22)+(0<<21)+(0<<20)+0x10000*2;
    //iis,reserved,end_int,1_tx,DMA disable,COUNT
    rBDICNT0 |= (1<<20);//enable
    rBDCON0 = 0x0<<2;

    /****** IIS Initialize ******/
    rIISCON=0x12;	//Rx DMA enable,Tx idle,prescaler enable
    rIISMOD=0x049;	//Slave,Tx,L-ch=low,iis,16bit ch.,codeclk=256fs,lrck=32fs
    rIISPSR=0x33;	//Prescaler_A/B enable, value=3
    rIISFCON=0x500;	//Tx/Rx DMA,Tx/Rx FIFO --> start piling....

    /****** Rx start ******/
    rIISCON |=0x1;

    while(!Rx_Done);

    /****** Rx Stop(Master) ******/
    rIISCON=0x0;    //IIS stop
    rIISFCON=0x0;   //for FIFO flush
    rBDICNT0=0x0;   //BDMA stop

    /****** Check Rx data ******/
    for(i=0;i<0x10000;i++)
    {
	j=*(rxdata+i);
	if(j!=i)
	{
	    Uart_Printf("IIS Rx fail!(Rx=%04x, Tx=%04x)\n", j,i); 
	    break;
	}
    }
    if(j+1==i)
	Uart_Printf("\nIIS Rx O.K.!!!\n");

    Uart_Printf("Last 256bytes in 65KB received data\n");
    for(i=0;i<0x100;i++)
	Uart_Printf("%04x,",*(rxdata+0xff00+i));

    free(rxdata);
    Cache_Flush();
    rNCACHBE0=0x0;

    rPCONC=save_conC;
    rPUPC=save_pupC;

    rINTMSK=BIT_GLOBAL;
    ChangePllValue(0x34,0x3,0x1);//Fin=10MHz, Fout=60MHz
    Uart_Init(0,115200);
}