watchver.gfl

FPGA-CPLD_DesignTool(example7),需要的朋友可以下载

# Verilog : PDCL (jhdparse)
__projnav/cnt60_jhdparse_tcl.rsp
# Verilog : PDCL (jhdparse)
__projnav/smallcntr_jhdparse_tcl.rsp
# Verilog : PDCL (jhdparse)
__projnav/stopwatch_jhdparse_tcl.rsp
# Verilog : PDCL (jhdparse)
__projnav/decode_jhdparse_tcl.rsp
# Verilog : PDCL (jhdparse)
__projnav/statmach_jhdparse_tcl.rsp
# Verilog : PDCL (jhdparse)
__projnav/hex2led_jhdparse_tcl.rsp
# Coregen : PDCL (jhdparse)
# Bencher Waveform : PDCL (jhdparse)
# Verilog : PDCL (jhdparse)
__projnav/stopwatch_tb_timing_jhdparse_tcl.rsp
# xst flow : RunXST
stopwatch.syr
stopwatch.ngr
stopwatch.prj
stopwatch.sprj
stopwatch.ana
stopwatch.stx
stopwatch.cmd_log
stopwatch.ngc
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
h:\my_designs\watchver/_ngo
stopwatch.ngd
stopwatch_ngdbuild.nav
stopwatch.bld
.untf
stopwatch.cmd_log
# Implementation : Map
stopwatch.nc1
stopwatch.mrp
stopwatch.pcf
stopwatch.ngm
stopwatch_map.ngm
stopwatch.mdf
stopwatch_map.ncd
__projnav/map.log
stopwatch.cmd_log
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
stopwatch.twr
stopwatch.twx
stopwatch.tsi
stopwatch.cmd_log
# Implmentation : Generate Post-Place & Route Static Timing
__projnav/nc1TOncd_tcl.rsp
stopwatch.ncd
stopwatch.par
stopwatch.pad
stopwatch.dly
stopwatch.xpi
stopwatch.grf
stopwatch.itr
stopwatch_last_par.ncd
__projnav/par.log
stopwatch.cmd_log
# Generate Programming File
__projnav/stopwatch_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
stopwatch.ut
# Generate Programming File
stopwatch.bgn
stopwatch.rbt
stopwatch.ll
stopwatch.msk
stopwatch.drc
stopwatch.nky
stopwatch.bit
stopwatch.bin
stopwatch.isc
stopwatch.cmd_log
# xst flow : RunXST
stopwatch.syr
stopwatch.ngr
stopwatch.prj
stopwatch.sprj
stopwatch.ana
stopwatch.stx
stopwatch.cmd_log
stopwatch.ngc
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
h:\my_designs\watchver/_ngo
stopwatch.ngd
stopwatch_ngdbuild.nav
stopwatch.bld
.untf
stopwatch.cmd_log
# Implementation : Map
stopwatch.nc1
stopwatch.mrp
stopwatch.pcf
stopwatch.ngm
stopwatch_map.ngm
stopwatch.mdf
stopwatch_map.ncd
__projnav/map.log
stopwatch.cmd_log
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
stopwatch.twr
stopwatch.twx
stopwatch.tsi
stopwatch.cmd_log
# Implmentation : Generate Post-Place & Route Static Timing
__projnav/nc1TOncd_tcl.rsp
stopwatch.ncd
stopwatch.par
stopwatch.pad
stopwatch.dly
stopwatch.xpi
stopwatch.grf
stopwatch.itr
stopwatch_last_par.ncd
__projnav/par.log
stopwatch.cmd_log
# Generate Programming File
__projnav/stopwatch_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
stopwatch.ut
# Generate Programming File
stopwatch.bgn
stopwatch.rbt
stopwatch.ll
stopwatch.msk
stopwatch.drc
stopwatch.nky
stopwatch.bit
stopwatch.bin
stopwatch.isc
stopwatch.cmd_log
# Generate Programming File
__projnav/stopwatch_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
stopwatch.ut
# Generate Programming File
stopwatch.bgn
stopwatch.rbt
stopwatch.ll
stopwatch.msk
stopwatch.drc
stopwatch.nky
stopwatch.bit
stopwatch.bin
stopwatch.isc
stopwatch.cmd_log
# Implementation : Analyze Power (XPower)
stopwatch.cxt