prescale_counter.gfl

FPGA-CPLD_DesignTool(example5-6),需要的朋友可以下载

# xst flow : RunXST
prescale_counter.syr
prescale_counter.ngr
prescale_counter.prj
prescale_counter.sprj
prescale_counter.ana
prescale_counter.stx
prescale_counter.cmd_log
prescale_counter.ngc
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
h:\my_designs\book\prescale_counter_vhd/_ngo
prescale_counter.ngd
prescale_counter_ngdbuild.nav
prescale_counter.bld
prescale_counter.ucf.untf
prescale_counter.cmd_log
# Implementation : Map
prescale_counter.nc1
prescale_counter.mrp
prescale_counter.pcf
prescale_counter.ngm
prescale_counter_map.ngm
prescale_counter.mdf
prescale_counter_map.ncd
__projnav/map.log
prescale_counter.cmd_log
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
prescale_counter.twr
prescale_counter.twx
prescale_counter.tsi
prescale_counter.cmd_log
# Implmentation : Generate Post-Place & Route Static Timing
__projnav/nc1TOncd_tcl.rsp
prescale_counter.ncd
prescale_counter.par
prescale_counter.pad
prescale_counter.dly
prescale_counter.xpi
prescale_counter.grf
prescale_counter.itr
prescale_counter_last_par.ncd
__projnav/par.log
prescale_counter.cmd_log