pn_gen_ver_211.npl

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JDF E
// Created by ISE ver 1.0
PROJECT pn_gen_ver_211
DESIGN pn_gen_ver_211 Normal
DEVKIT xcv300-6bg432
DEVFAM virtex
FLOW XST Verilog
STIMULUS pn_gen_srl_test.tf Normal
DOCUMENT readme
MODULE iq_pn_gen.v
MODSTYLE iq_pn_gen Normal
[STRATEGY-LIST]
Normal=True, 1008173684
[Normal]
_SynthVerilogPrePro=expvlg, VIRTEX, Synthesis.t_synthesize, 1007488229, True