tc9256.lst

pll锁向环控制程序

C51 COMPILER V7.50   TC9256                                                                10/16/2006 11:18:34 PAGE 1   


C51 COMPILER V7.50, COMPILATION OF MODULE TC9256
OBJECT MODULE PLACED IN TC9256.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE TC9256.C BROWSE DEBUG OBJECTEXTEND

line level    source

   1          #include "reg51x.h"
   2          #include "tab.h"
   3          #include <stdio.h>
   4          #include <intrins.h> 
   5          #include "78e65.h"
   6          #define pll_lock_check 0
   7          #define txpll 1
   8          #define RXAdd107MHz 1 
   9          sbit PLL_EN= P1^7;
  10          sbit PLL_CLK=P1^6;
  11          sbit PLL_DATA=P1^5;
  12          sbit LED =P1^4;
  13          #if txpll
  14          sbit ch1=P3^5;
  15          sbit ch2=P3^4;
  16          sbit ch3=P3^3;
  17          sbit ch4=P3^7;
  18          //uchar code SETtestCHx[3]={0X7a,0X13,0X5A};//   49.860
  19          uchar code SETCHx[15][3]=
  20                  {
  21                  {0X45,0X13,0X5A},//49.330
  22                  {0X4a,0X13,0X5A},//49.380
  23                  {0X4f,0X13,0X5A},//49.430
  24                  {0X54,0X13,0X5A},//49.480
  25                  {0X59,0X13,0X5A},//49.530
  26                  {0X5e,0X13,0X5A},//49.580
  27                  {0X63,0X13,0X5A},//49.630
  28                  {0X68,0X13,0X5A},//49.680
  29                  {0X6d,0X13,0X5A},//49.730
  30                  {0X72,0X13,0X5A},//49.780
  31                  {0X77,0X13,0X5A},// 49.830
  32                  {0X7C,0X13,0X5A},//   49.880
  33                  {0X81,0X13,0X5A},//49.930
  34                  {0X86,0X13,0X5A},//49.980
  35                  {0X8b,0X13,0X5A} //50.030
  36                  };
  37          #else
                      #if RXAdd107MHz    //49.880+10.7MHz
              sbit ch1=P1^3;
              sbit ch2=P1^2;
              sbit ch3=P1^1;
              sbit ch4=P1^0;
              uchar code SETCHx[15][3]=
                      {
                      {0X73,0X17,0X5A},//49.33 3863 6003
                      {0X78,0X17,0X5A},//49.38 3868 6008
                      {0X7d,0X17,0X5A},//49.43 3873 6013
                      {0X82,0X17,0X5A},//49.48 3878 6018
                      {0X87,0X17,0X5A},//49.53 3883 6023
                      {0X8c,0X17,0X5A},//49.58 3888 6028
                      {0X91,0X17,0X5A},//49.63 3893 6033
                      {0X96,0X17,0X5A},//49.68 3898 6038
                      {0X9b,0X17,0X5A},//49.73 3903 6043
                      {0Xa0,0X17,0X5A},//49.78 3908 6048
                      {0Xa5,0X17,0X5A},//49.83 3913 6053
C51 COMPILER V7.50   TC9256                                                                10/16/2006 11:18:34 PAGE 2   

                      {0Xaa,0X17,0X5A},// 49.88 3918 6058
                      {0Xaf,0X17,0X5A},//49.93 3923 6063
                      {0Xb4,0X17,0X5A},//49.98 3928 6068
                      {0Xb9,0X17,0X5A} //50.03 3933 6073
                      };
                      #else                   //49.880-10.7MHz
              sbit ch1=P3^2;
              sbit ch2=P3^3;
              sbit ch3=P3^4;
              sbit ch4=P3^5;
              uchar code SETCHx[15][3]=
                      {
                      {0X17,0X0F,0X5A},//49.330 3863
                      {0X1c,0X0F,0X5A},//49.380 3868
                      {0X21,0X0F,0X5A},//49.430 3873
                      {0X26,0X0F,0X5A},//49.480 3878
                      {0X2b,0X0F,0X5A},//49.530 3883
                      {0X30,0X0F,0X5A},//49.580 3888
                      {0X35,0X0F,0X5A},//49.630 3893
                      {0X3a,0X0F,0X5A},//49.680 3898
                      {0X3f,0X0F,0X5A},//49.730 3903
                      {0X44,0X0F,0X5A},//49.780 3908
                      {0X49,0X0F,0X5A},//49.830 3913 
                      {0X4e,0X0F,0X5A},//49.880   3918
                      {0X53,0X0F,0X5A},//49.930 3923
                      {0X58,0X0F,0X5A},//49.980 3928
                      {0X5d,0X0F,0X5A} //50.030 3933
                      };
                      #endif
              #endif
  86          uchar code poweronD0H[3]={0X0,0X0,0X3F};
  87          uchar code poweronD2H[3]={0X0,0X0,0X0};
  88          uchar code SETD2H[3]={0XA0,0X00,0X00};
  89          /*
  90          uchar code SETCH1[3]={0X0F,0X44,0X5A};//39.080
  91          uchar code SETCH2[3]={0X0F,0X49,0X5A};//39.130
  92          uchar code SETCH3[3]={0X0F,0X4E,0X5A};//39.180
  93          uchar code SETCH4[3]={0X0F,0X53,0X5A};//39.230//*/
  94          void waiting()//Xtal = 12MHZ
  95          {_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();
  96   1      }
  97          SendPLLData(uchar *Data1,uchar addr)
  98          {
  99   1           unsigned char i,j;
 100   1           unsigned char data2;
 101   1      
 102   1           PLL_EN=1;
 103   1           PLL_CLK=1;
 104   1           PLL_DATA=1;
 105   1           waiting();
 106   1           PLL_EN=0;      // PLL_EN pull down     
 107   1           for ( i=0; i<8; i++ )   // send first 8bits address
 108   1           {
 109   2           PLL_CLK=0;
 110   2               if ( addr&0x01 )
 111   2                      {
 112   3                      PLL_DATA=1;
 113   3                      }
 114   2               else
 115   2                      {
 116   3                      PLL_DATA=0;
 117   3                      }
C51 COMPILER V7.50   TC9256                                                                10/16/2006 11:18:34 PAGE 3   

 118   2               waiting();
 119   2               PLL_CLK=1;
 120   2               waiting();
 121   2               addr >>= 1;
 122   2               }
 123   1               //-----------
 124   1               PLL_EN=1;     // PLL_EN pull up
 125   1               waiting();
 126   1               for(j=0;j<3;j++)
 127   1                      {
 128   2                      data2= *Data1;
 129   2                      for ( i=0; i<8; i++ )   // send first 8bits address
 130   2                      {
 131   3                      PLL_CLK=0;      
 132   3                      if ( data2&0x01 )
 133   3                              {
 134   4                              PLL_DATA=1;
 135   4                              }
 136   3                      else
 137   3                              {
 138   4                              PLL_DATA=0;
 139   4                              }
 140   3                      waiting();      
 141   3                      PLL_CLK=1;
 142   3                      waiting();
 143   3                      data2 >>= 1;
 144   3                      }
 145   2                      Data1++;
 146   2                      }
 147   1               waiting();
 148   1               PLL_EN=0;     
 149   1               // send end
 150   1               waiting();
 151   1               PLL_EN=1;
 152   1               PLL_DATA=1;
 153   1               waiting();
 154   1       }
 155          #if pll_lock_check
              ReadPLLData(uchar *Data1,uchar addr)
              {
                      unsigned char i,j;
                      unsigned char data2;
                      PLL_EN=1;
                      PLL_CLK=1;
                      PLL_DATA=1;
                      waiting();
                      PLL_EN=0;      // PLL_EN pull down     
                      for ( i=0; i<8; i++ )   // send first 8bits address
                      {
                      PLL_CLK=0;      
                      if ( addr&0x01 )
                              {
                              PLL_DATA=1;
                              }
                      else
                              {
                              PLL_DATA=0;
                              }