.cdtbuild

来自「基于FPGA的VGA控制器设计。对外支持普通VGA接口」· CDTBUILD 代码 · 共 28 行

<?xml version="1.0" encoding="UTF-8"?>
<ManagedProjectBuildInfo>
    <target artifactName="blank_project_0_syslib.a"
        cleanCommand="rm -rf" defaultExtension="a"
        id="blank_project_0_syslib.nios2.lib.415323775"
        isAbstract="false" isTest="false" name="Nios II Library" parent="nios2.lib">
        <configuration id="nios2.lib.release.433406973" name="Release" parent="nios2.lib.release">
            <toolReference id="org.eclipse.cdt.build.tool.cygwin.compiler">
                <optionReference defaultValue="Optimize more (-O2)" id="cygwin.compiler.general.optimization.level"/>
                <optionReference defaultValue="None" id="cygwin.compiler.debugging.level"/>
                <optionReference id="cygwin.preprocessor.def.symbols">
                    <listOptionValue builtIn="false" value="ALT_RELEASE"/>
                </optionReference>
            </toolReference>
        </configuration>
        <configuration id="nios2.lib.debug.1557562852" name="Debug" parent="nios2.lib.debug">
            <toolReference id="org.eclipse.cdt.build.tool.cygwin.compiler">
                <optionReference id="cygwin.preprocessor.def.symbols">
                    <listOptionValue builtIn="false" value="ALT_DEBUG"/>
                </optionReference>
                <optionReference id="cygwin.compiler.general.include.paths"/>
            </toolReference>
        </configuration>
    </target>
    <defaultConfig id="nios2.lib.debug.1557562852"/>
    <defaultTarget id="blank_project_0_syslib.nios2.lib.415323775"/>
</ManagedProjectBuildInfo>