📄 upsd3300_adc.lst
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C51 COMPILER V7.50 UPSD3300_ADC 07/11/2005 15:30:33 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE UPSD3300_ADC
OBJECT MODULE PLACED IN upsd3300_adc.OBJ
COMPILER INVOKED BY: C:\keil\C51\BIN\C51.EXE upsd3300_adc.c OPTIMIZE(9,SIZE) BROWSE DEBUG OBJECTEXTEND
line level source
1 /*------------------------------------------------------------------------------
2 upsd3300_adc.c
3
4 Version:
5 August 2004 Version 2.0 - Updated include file names, modified comments, and
6 removed Turbo from function names.
7
8 Dependencies: None.
9
10 Description:
11 The uPSD3300 ADC device driver is intended to provide functions to initialize
12 and read the analog to digital converter for the uPSD family.
13 See uPSD3300_adc.h for function proto types.
14
15
16 Copyright (c) 2004 STMicroelectronics Inc.
17
18 This example demo code is provided as is and has no warranty,
19 implied or otherwise. You are free to use/modify any of the provided
20 code at your own risk in your applications with the expressed limitation
21 of liability (see below) so long as your product using the code contains
22 at least one uPSD product (device).
23
24 LIMITATION OF LIABILITY: NEITHER STMicroelectronics NOR ITS VENDORS OR
25 AGENTS SHALL BE LIABLE FOR ANY LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA,
26 INTERRUPTION OF BUSINESS, NOR FOR INDIRECT, SPECIAL, INCIDENTAL OR
27 CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER THIS AGREEMENT OR
28 OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
29 ------------------------------------------------------------------------------*/
30
31 #include <intrins.h>
32
33 #include "upsd3300.h"
34 #include "upsd3300_hardware.h"
35 #include "upsd3300_adc.h"
36
37 #if (FREQ_OSC > 20000) // Set up ADC Prescaler Divider
38 #define ADC_CLOCK_DIVIDER 1
39 #else
#define ADC_CLOCK_DIVIDER 0
#endif
42
43
44 /*------------------------------------------------------------------------------
45 ADC_EnableAll()
46
47 This function enables all the ADC channels and sets the ADC Clock frequency.
48 ------------------------------------------------------------------------------*/
49 void ADC_EnableAll()
50 {
51 1 ACON = 0; // Turn off ADC
52 1
53 1 P1SFS0 = 0xFF;
54 1 P1SFS1 = 0xFF; // Setup P1 Port corresponding pin as AD input
55 1
C51 COMPILER V7.50 UPSD3300_ADC 07/11/2005 15:30:33 PAGE 2
56 1 ADCPS =(0x08 + ADC_CLOCK_DIVIDER); // Enable ADC clock, setup ADC clock freq
57 1 _nop_();
58 1 ACON = 0x20; // Enable ADC
59 1
60 1 // NOTE: USER CODE MUST WAIT AT LEAST 20 MS before calling ADC_Read (Using the ADC)
61 1 }
62
63
64
65 /*------------------------------------------------------------------------------
66 ADC_Init(channel)
67
68 channel - unsigned char
69 - ADC channel to initialize (0 to 7)
70
71 This function enables the specified ADC channel, initializes the ADC clock, and
72 disables the ADC interrupt. It must be called when the ADC channel is changed.
73 ------------------------------------------------------------------------------*/
74 void ADC_Init (unsigned char channel)
75 {
76 1 unsigned char temp;
77 1 ACON = 0; // Turn off ADC
78 1
79 1 temp = (0x01) << channel; // create channel bit pattern
80 1 P1SFS0 |= temp;
81 1 P1SFS1 |= temp; // Setup P1 Port corresponding pin as AD input
82 1
83 1 ADCPS =(0x08 + ADC_CLOCK_DIVIDER); // Enable ADC clock, setup ADC clock freq
84 1 _nop_();
85 1 ACON = 0x20; // Enable ADC
86 1
87 1 // NOTE: USER CODE MUST WAIT AT LEAST 20 MS before calling ADC_Read (Using the ADC)
88 1 }
89
90 /*------------------------------------------------------------------------------
91 ADC_Read(channel)
92
93 This function reads the specified ADC channel and returns the result. The ADC
94 must be initialization first with ADC_Init() before calling this function.
95
96 channel - unsigned char
97 - ADC channel to read (0 to 7)
98
99 Returns:
100 ADC result.
101 -------------------------------------------------------------------------------*/
102 unsigned int ADC_Read( unsigned char channel )
103 {
104 1 unsigned int temp_ADC_result;
105 1 ACON &= 0xE0; //Clears the input channels ~(00101110B) = (11010001B)
106 1
107 1 ACON |= (channel<<2); //Setup Channel
108 1 _nop_ ();
109 1 _nop_ ();
110 1
111 1 ACON |= 0x02; //Start ADC conversion
112 1 _nop_ (); //delay 1 machine cycle: ADST: 1->0
113 1
114 1 while( (ACON & 0x01) != 1 ); //Waits for Conversion complish
115 1
116 1 // Note: For increased ADC accuracy, the while loop above should be
117 1 // replaced with code that puts the MCU into Idle mode via PCON
C51 COMPILER V7.50 UPSD3300_ADC 07/11/2005 15:30:33 PAGE 3
118 1 // and makes use of the ADC interrupt to exit the Idle mode.
119 1 // The user would need to enable the ADC int and define the ADC ISR.
120 1
121 1 temp_ADC_result = (ADAT1<<8)+ADAT0; //Calculate ADC conversion result
122 1
123 1 return (temp_ADC_result);
124 1 }
125
126
127
128
129
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 80 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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