test_adc_dac.ucf

These files are for testing the ADC (AD9240) and DAC THS8133 (DAC1). The ADC and DAC are tested i

NET "clk"  LOC = "D18"  ;
NET "rst"  LOC = "AD3"  ;

#---------- ADC SIGNALS (ADC 9240)---------------
NET "adcclk"  LOC = "AA30"  ;
#NET "data<0>"  LOC = "AA27"  ;
#NET "data<1>"  LOC = "AA28"  ;
#NET "data<2>"  LOC = "AA25"  ;
#NET "data<3>"  LOC = "AA26"  ;
NET "data<4>"  LOC = "Y31"  ;
NET "data<5>"  LOC = "Y32"  ;
NET "data<6>"  LOC = "Y29"  ;
NET "data<7>"  LOC = "Y28"  ;
NET "data<8>"  LOC = "Y25"  ;
NET "data<9>"  LOC = "Y26"  ;

NET "data<10>"  LOC = "W31" ;
NET "data<11>"  LOC = "W32"  ;
NET "data<12>"  LOC = "W33"  ;
NET "data<13>"  LOC = "Y33"  ;

  





#-----------------DAC SIGNALS----------------

#Control lines of DAC1 THS8133

net		"MODE1_DAC1"		LOC	=		"AK31"   ;
net		"MODE2_DAC1"		LOC	=		"AK32"   ;
net		"SYNC_T_DAC1"		LOC	=		"AJ33"   ;
net		"SYNC_DAC1"		LOC	=		"AJ34" ;
net		"CLK_DAC1"		LOC	=		"AK34" ;
net		"BLANK_DAC1"		LOC	=		"AH33" ;

# Data on Y output

net		"DOUT<0>"		LOC	=		"AJ30" ;
net		"DOUT<1>"		LOC	=		"AJ31" ;
net		"DOUT<2>"		LOC	=		"AH29" ;
net		"DOUT<3>"		LOC	=		"AH30" ;
net		"DOUT<4>"		LOC	=		"AG29"  ;
net		"DOUT<5>"		LOC	=		"AG30"  ;
net		"DOUT<6>"		LOC	=		"AG28"  ;
net		"DOUT<7>"		LOC	=		"AL33"  ;
net		"DOUT<8>"		LOC	=		"AL34"  ;
net		"DOUT<9>"		LOC	=		"AK33"  ;


#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE