📄 traffic控制模块.txt
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity traffic is
port(clk1,clk1k:in std_logic;
change:in std_logic;
light1:out std_logic_vector(2 downto 0);
light2:out std_logic_vector(2 downto 0);
sel:out std_logic_vector(3 downto 0);
seg:out std_logic_vector(6 downto 0));
end traffic;
architecture a of traffic is
type states is (s1,s2,s3,s4,s5);
signal state:states;
signal num1,num2,num3,num4:integer range 0 to 9;
signal ch:std_logic:='0';
signal count:integer range 0 to 49;
signal num: integer range 0 to 9;
begin
u1:process(change)
begin
if(change='1')then
ch<=not ch;
end if;
end process;
u2:process(clk1,ch)
begin
if(clk1'event and clk1='1')then
if(ch='1')then count<=count;
elsif(count=0)then
count<=49;
else count<=count-1;
end if;
end if;
end process;
u3:process(ch,count)
begin
if(ch='1')then state<=s5;
elsif(count>=30)then state<=s1;
elsif(count<30 and count>=25)then state<=s2;
elsif(count<25 and count>=5)then state<=s3;
else state<=s4;
end if;
case state is
when s1=>light1<="001";light2<="100";
when s2=>light1<="001";light2<="010";
when s3=>light1<="100";light2<="001";
when s4=>light1<="010";light2<="001";
when s5=>light1<="001";light2<="001";
end case;
end process;
u5:process(ch,count)
begin
if(count>=45)then num1<=2;num2<=count-45;num3<=1;num4<=count-40;
elsif(count<45 and count>=40)then
num1<=1;num2<=count-35;num3<=1;num4<=count-40;
elsif(count<40 and count>=35)then
num1<=1;num2<=count-35;num3<=0;num4<=count-30;
elsif(count<35 and count>=30)then
num1<=0;num2<=count-25;num3<=0;num4<=count-30;
elsif(count<30 and count>=25)then
num1<=0;num2<=count-25;num3<=0;num4<=count-25;
elsif(count<25 and count>=20)then
num1<=1;num2<=count-15;num3<=2;num4<=count-20;
elsif(count<20 and count>=15)then
num1<=1;num2<=count-15;num3<=1;num4<=count-10;
elsif(count<15 and count>=10)then
num1<=0;num2<=count-5;num3<=1;num4<=count-10;
elsif(count<10 and count>=5)then
num1<=0;num2<=count-5;num3<=0;num4<=count;
else num1<=0;num2<=count;num3<=0;num4<=count;
end if;
end process;
u6:process(clk1k)
variable temp:integer range 0 to 3;
begin
if(clk1k'event and clk1k='1')then
case temp is
when 0=>num<=num1;temp:=1;sel<="0111";
when 1=>num<=num2;temp:=2;sel<="1011";
when 2=>num<=num3;temp:=3;sel<="1101";
when 3=>num<=num4;temp:=0;sel<="1110";
end case;
end if;
end process;
u7:process(num)
begin
case num is
when 0=>seg<="0111111";
when 1=>seg<="0000110";
when 2=>seg<="1011011";
when 3=>seg<="1001111";
when 4=>seg<="1100110";
when 5=>seg<="1101101";
when 6=>seg<="1111101";
when 7=>seg<="0000111";
when 8=>seg<="1111111";
when 9=>seg<="1101111";
when others=>seg<="XXXXXXX";
end case;
end process;
end;
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