nand01gr3b.vhd

nand flash NAND01GR3B (st)的仿真模型 （VHDL） 的

       port map (hold_Command, Kernel_CUIcommand, Kernel_VerifyEvent, Kernel_CommandDecode, Kernel_IseqCommand, notActive_cmd);
       
CUIdec_ReadElectronicSignature: CUIdecoder_entity
       generic map (ReadElectronicSignature_cmd, ReadElectronicSignature_seqAddr, ReadElectronicSignature_CmdLen, false)
       port map (hold_Command, Kernel_CUIcommand, Kernel_VerifyEvent, Kernel_CommandDecode, Kernel_IseqCommand, notActive_cmd);
       
CUIdec_BlockLock: CUIdecoder_entity
       generic map (BlockLock_cmd, BlockLock_seqAddr, BlockLock_CmdLen, false)
       port map (hold_Command, Kernel_CUIcommand, Kernel_VerifyEvent, Kernel_CommandDecode, Kernel_IseqCommand, notActive_cmd);

CUIdec_BlockLockDown: CUIdecoder_entity
       generic map (BlockLockDown_cmd, BlockLockDown_seqAddr, BlockLockDown_CmdLen, false)
       port map (hold_Command, Kernel_CUIcommand, Kernel_VerifyEvent, Kernel_CommandDecode, Kernel_IseqCommand, notActive_cmd);

CUIdec_ReadBlockLockStatus: CUIdecoder_entity
       generic map (ReadBlockLockStatus_cmd, ReadBlockLockStatus_seqAddr, ReadBlockLockStatus_CmdLen, false)
       port map (hold_Command, Kernel_CUIcommand, Kernel_VerifyEvent, Kernel_CommandDecode, Kernel_IseqCommand, notActive_cmd);

CUIdec_BlockUnLockStart: CUIdecoder_entity
       generic map (BlockUnLockStart_cmd, BlockUnLockStart_seqAddr, BlockUnLockStart_CmdLen, false)
       port map (hold_Command, Kernel_CUIcommand, Kernel_VerifyEvent, Kernel_CommandDecode, Kernel_IseqCommand, notActive_cmd);

CUIdec_BlockUnLockEnd: CUIdecoder_entity
       generic map (BlockUnLockEnd_cmd, BlockUnLockEnd_seqAddr, BlockUnLockEnd_CmdLen, false)
       port map (hold_Command, Kernel_CUIcommand, Kernel_VerifyEvent, Kernel_CommandDecode, Kernel_IseqCommand, notActive_cmd);

CUIdec_ResetCmd: CUIdecoder_entity
       generic map (Reset_cmd, Reset_seqAddr, Reset_CmdLen, false)
       port map (hold_Command, Kernel_CUIcommand, Kernel_VerifyEvent, Kernel_CommandDecode, Kernel_IseqCommand, notActive_cmd);
  





-- Internal Signal

-- Chip Enable 
CE_N <= E_N and VddOK ;
-- Write Enable for Data
WLE_N <= W_N or CE_N or CL or AL or not(R_N);
-- Read Enable for Data
RLE_N <= R_N or (E_N and VddOK) or CL or AL or not(W_N);
-- Address Latch Enable
ALE_N <= not(AL) or CE_N or not(CLE_N) or not(R_N) or W_N;
-- Command Latch Enable
CLE_N <= not(CL) or CE_N or not(ALE_N) or not(R_N) or W_N;

-- Interface signals 1 delta delayed (syncronized with RLE_N)
E_N_d1 <= E_N;
R_N_d1 <= R_N;

-- Interface signals 1 delta delayed (syncronized with WLE_N)
W_N_d1 <= W_N;

RB_N <= RB_N_int;

I_O <= DataBusOut;

-- Reset Signal
Reset <=  Powerup or ResetSoftware;




-------------------------------------------------------------------------
-------------------------------------------------------------------------
--- CORE PROCESSES ------------------------------------------------------
-------------------------------------------------------------------------
-------------------------------------------------------------------------


-- Ready/Busy
process_RBN_manager : process (Kernel_Status.busy, isInit)

begin
     if isInit=true then
         RB_N_int <= '0' ;
     elsif Kernel_Status.busy'event then     
         if Kernel_Status.busy=true and Kernel_Status.busy'delayed(1 fs)=false then
            RB_N_int <= '0' after RB_delay;
         elsif Kernel_Status.busy=true and Kernel_Status.busy'delayed(1 fs)=true then
            RB_N_int <= '0' ;  -- transizioni spurie di kernel_busy che avvengono nello stesso istante    
         elsif Kernel_Status.busy=false then
            RB_N_int <= 'Z' ;
         end if;
     end if;    
  
end process process_RBN_manager;





-- Init Process for reset any value
process_Init: process(isInit) begin 
         if (isInit) then
                Powerup <= true, false after tBLBH4(CD.TimeIndex_dev);
                isInit <= false;
                isLatchBlockAddress  := false;
                isPageProgramCmdCode := false; 
                isCopyBackCmdCode    := false;
                isSR_underCACHEREAD  := false;
                isFirstCPoperation   := true;
         end if;
end process process_Init;




-- modelling PRL signal
process_PRL_manager : process begin
  wait until PRL'event;
  if (PRL = '1') then 
    BlockMode_on <= true;
    PrintString("[" & time2str(now) & "]  " &  chip_indication  &
                "****** PRL  set to 1 : Lock Mode enabled");
  else 
    BlockMode_on <= false;
    PrintString( "[" & time2str(now) & "]  " & chip_indication  & 
                 "****** PRL  set to 0 : Lock Mode disabled");
  end if;
  SetBlocks <= now;
end process process_PRL_manager;



-- latch command
process_CommandLatch: process begin
    Wait Until (CLE_N='0' and CLE_N'event);
    Wait Until (CLE_N='1' and CLE_N'event);
    if powerUp=true then
       PrintString("[" & time2str(now) & "]  " &  chip_indication  & 
                    " #Warning: Device is in PowerUp mode. Command Ignored ");
    else
       Kernel_CUIcommand <= not(Kernel_CUIcommand);
       hold_Command <= I_O(IObus_range);
    end if;   
end process;




-- viene generato un errore (Kernel_ErrorEvent <= '1')
-- se entro un 1ps il codice di comando latchato non viemne riconosciuto
process_VerifyError : Process begin
    Wait Until Kernel_CUIcommand'event;
    Kernel_ErrorEvent <= '1' after 1 ps; -- Error if not verify event at same delta time.
    Wait Until Kernel_VerifyEvent'event; -- Kernel_VerifyEvent e' un'uscita del CUIdecoder 
                                         -- che segnala il riconoscimento di un codice di comando.
    Kernel_ErrorEvent <= 'X'; -- Error Suppressed
End Process ;




-- controllo sulla tensione di alimentazione
process_VoltageController   : Process (Vdd) begin
     if (Vdd>=CD.Vddmin_dev and Vdd<=CD.Vddmax_dev) then 
             VDD_check <= true;
             PrintString("[" & time2str(now) & "]  " &  chip_indication  & 
                          "****** VDD range is OK");
        elsif now /= 0 ns then
             VDD_check <= false;
             PrintString("[" & time2str(now) & "]  " &  chip_indication  & 
                          "****** !ATTENTION: VDD out of Range");
     end if;
End Process process_VoltageController;





-- Latch Data
process_DataBusIn: Process begin

     wait until ( (W_N_d1'event and W_N_d1='1') and  (WLE_N'event and WLE_N='1') );

     if  ( not(kernel_status.busy) or (CacheStatus.isCacheMode and not(CacheStatus.busy)) ) 
     and powerUp=false then
             
             if ((now>0 ns)  and isDebug) then 
                PrintString( "[" & time2str(now) & "]  " & chip_indication & 
                             "Data Input: " & Str2Hex(Slv2Str(I_O)));
             end if;
            
             if (isPageProgramCmdCode and isFirstData) then 

                PageBuffer_task.task       <= PutMemAddress;
                PageBuffer_task.MemAddress <= slv2int(hold_address);
                PageBuffer_task.MemAddressEnd <= 0; --NP
                PageBuffer_task.ColAddress <= slv2int(hold_address(ColumnAddress_range));
                PageBuffer_task.eventTime  <= now; 
                PageBuffer_task.Index      <= 0; -- NP;
                PageBuffer_task.data       <= (others => '0'); -- NP
                PageBuffer_task.resIndex      <= 0; -- NP
                
                wait until Kernel_PageComplete'event;

                isFirstData := false;

             end if;
             
             if (isCopyBackCmdCode) then
                waitFirstCopyBackAddress := false;
                PageBuffer_task.task <= PutCopyBackData;
             else 
                PageBuffer_task.task <= PutData;
             end if;

             PageBuffer_task.data       <= to_bitvector(I_O);     
             PageBuffer_task.eventTime  <= now;    
             PageBuffer_task.MemAddress <= 0; -- NP
             PageBuffer_task.ColAddress <= 0;
             PageBuffer_task.Index      <= 0; -- NP
             PageBuffer_task.resIndex      <= 0; -- NP

      end if;       
                     
End Process process_DataBusIn;






-- Latch Address
process_AddressLatch : process     

Variable nCycle : Natural := 0;
Variable hold_address_ext  : TotAddress_type;
Variable hold_block_ext    : TotBlockAddress_type;

Begin

wait until ALE_N'event or Reset'event or Kernel_CUIcommand'event or Kernel_ReadEvent'event or AL'event; 

if powerUp=false then

  if ( Reset'event and Reset) then 
        hold_address<=(Others =>  '0');
        hold_block <= (Others => '0');     
        isPageProgramCmdCode := false;
        nCycle:=1;

  
  elsif not(kernel_status.busy) or 
        ( CacheStatus.isCacheMode and not(CacheStatus.busy) ) then
  
        if (Kernel_CUIcommand'event or Kernel_ReadEvent'event) then 
          nCycle := 1;
  
  
        elsif (ALE_N'event and ALE_N='1') then
       
       
              if (CD.bus_dev=bus16) then


                  case nCycle is


                  when 1 =>
                    hold_block_ext(1 downto 0) := I_O(7 downto 6);
                    hold_address_ext(7 downto 0)   := I_O(7 downto 0);
                    nCycle := nCycle + 1;


                  when 2 =>

                    -- latch 2nd part of word address
                    hold_address_ext(10 downto 8) := I_O(2 downto 0);
                    
                    -- latch 2nd part block address
                    if ( CD.size_dev = s_512M ) then 
                        hold_block_ext(8 downto 2) := I_O(6 downto 0);
                    else     
                        hold_block_ext(9 downto 2) := I_O(7 downto 0);
                    end if;
                    
                    -- if size = 512 or 1G then block address is complete
                    if ( CD.size_dev <= s_1G ) then
                       hold_block <= hold_block_ext(BlockAddress_normRange);
                    end if;    

                    -- control if column address is out of spare area
                    if (isLatchBlockAddress = false) and (I_O(2) = '1') then   
                        if slv2int(hold_address_ext(10 downto 0)) > PageSize - 1 then
                                 PrintString("[" & time2str(now) & "]  " &  chip_indication & 
                                              "#Warning: Memory Address not valid in Spare Area: "
                                              & "Address[9 downto 5]=0 is assumend");
                                 hold_address_ext(9 downto 5) := (Others =>  '0');
                        end if;
                    end if;
                    
                    -- Copy Back operation: get column address for change Index Page in PageBuffer 
                    if (isCopyBackCmdCode and waitFirstCopyBackAddress = false) then 
                        hold_address(ColumnAddress_range) <= hold_address_ext(ColumnAddress_range);
                        nCycle := 0 ;
                        PrintString("[" & time2str(now) & "]  " &  chip_indication &
                                     "Column Address: " & slv2hex(hold_address_ext(ColumnAddress_range)) 
                                     & " (" & int2str(slv2int(hold_address_ext(ColumnAddress_range))) & ")" );
                    end if;

                    -- when device is latching BlockAddress...                
                    if ( (CD.size_dev <= s_1G) and isLatchBlockAddress = true ) then
                         nCycle :=0;
                         PrintString("[" & time2str(now) & "]  " &  chip_indication &
                                      "Block Number Latched: " &
                                      int2str(slv2int(hold_block_ext(BlockAddress_normRange))) );
                         isLatchBlockAddress := false;
                         --Kernel_LatchAddress <= now after 1 fs;
                         Kernel_LatchAddress <= now ;