📄 bit_synchronous.rpt
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!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC039;
-- Node name is ':28' = 'count18758'
-- Equation name is 'count18758', location is LC020, type is buried.
count18758 = DFFE( _EQ025 $ _LC043, clk_480KHz, VCC, VCC, VCC);
_EQ025 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & !_LC043 &
preset18758
# !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC043 &
!preset18758;
-- Node name is ':27' = 'count18759'
-- Equation name is 'count18759', location is LC021, type is buried.
count18759 = DFFE( _EQ026 $ _LC045, clk_480KHz, VCC, VCC, VCC);
_EQ026 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & !_LC045 &
preset18759
# !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC045 &
!preset18759;
-- Node name is ':26' = 'count187510'
-- Equation name is 'count187510', location is LC037, type is buried.
count187510 = DFFE( _EQ027 $ _LC046, clk_480KHz, VCC, VCC, VCC);
_EQ027 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & !_LC046 &
preset187510
# !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC046 &
!preset187510;
-- Node name is ':13' = 'fangbo'
-- Equation name is 'fangbo', location is LC055, type is buried.
fangbo = TFFE( VCC, _EQ028, VCC, VCC, VCC);
_EQ028 = en_clock & fb;
-- Node name is ':12' = 'm0'
-- Equation name is 'm0', location is LC056, type is buried.
m0 = DFFE( m1 $ GND, _EQ029, VCC, VCC, VCC);
_EQ029 = en_clock & fb;
-- Node name is ':11' = 'm1'
-- Equation name is 'm1', location is LC060, type is buried.
m1 = DFFE( m2 $ GND, _EQ030, VCC, VCC, VCC);
_EQ030 = en_clock & fb;
-- Node name is ':10' = 'm2'
-- Equation name is 'm2', location is LC063, type is buried.
m2 = DFFE( _EQ031 $ !m1, _EQ032, VCC, VCC, VCC);
_EQ031 = !m0 & !m1 & m2
# !m0 & m1;
_EQ032 = en_clock & fb;
-- Node name is ':47' = 'preset18750'
-- Equation name is 'preset18750', location is LC035, type is buried.
preset18750 = DFFE( _EQ033 $ VCC, bit_pulse, VCC, VCC, VCC);
_EQ033 = !count18751 & !count18752 & count18753 & !count18754 &
count18755 & !count18756 & count18757 & count18758 &
count18759 & !count187510
# !count18750 & !count18752 & count18753 & !count18754 &
count18755 & !count18756 & count18757 & count18758 &
count18759 & !count187510;
-- Node name is ':46' = 'preset18751'
-- Equation name is 'preset18751', location is LC048, type is buried.
preset18751 = DFFE( _EQ034 $ _EQ035, bit_pulse, VCC, VCC, VCC);
_EQ034 = count18750 & count18751 & count18753 & count18755 &
count18757 & count18758 & count18759 & !count187510 & _X001
# count18752 & count18753 & count18755 & count18757 &
count18758 & count18759 & !count187510 & _X001
# count18754 & count18755 & count18757 & count18758 &
count18759 & !count187510 & _X001;
_X001 = EXP( count18756 & count18757 & count18758 & count18759);
_EQ035 = !count187510 & _X001;
_X001 = EXP( count18756 & count18757 & count18758 & count18759);
-- Node name is ':44' = 'preset18753'
-- Equation name is 'preset18753', location is LC044, type is buried.
preset18753 = DFFE( _EQ036 $ fast, bit_pulse, VCC, VCC, VCC);
_EQ036 = !count18751 & !count18752 & count18753 & !count18754 &
count18755 & !count18756 & count18757 & count18758 &
count18759 & !count187510 & fast
# !count18750 & !count18752 & count18753 & !count18754 &
count18755 & !count18756 & count18757 & count18758 &
count18759 & !count187510 & fast;
-- Node name is ':43' = 'preset18754'
-- Equation name is 'preset18754', location is LC042, type is buried.
preset18754 = DFFE( _EQ037 $ _EQ038, bit_pulse, VCC, VCC, VCC);
_EQ037 = count18750 & count18751 & count18753 & count18755 &
count18757 & count18758 & count18759 & fast & _X002 &
_X003
# count18752 & count18753 & count18755 & count18757 &
count18758 & count18759 & fast & _X002 & _X003
# count18754 & count18755 & count18757 & count18758 &
count18759 & fast & _X002 & _X003;
_X002 = EXP( count187510 & fast);
_X003 = EXP( count18756 & count18757 & count18758 & count18759 & fast);
_EQ038 = _X002 & _X003;
_X002 = EXP( count187510 & fast);
_X003 = EXP( count18756 & count18757 & count18758 & count18759 & fast);
-- Node name is ':41' = 'preset18756'
-- Equation name is 'preset18756', location is LC027, type is buried.
preset18756 = DFFE( GND $ VCC, bit_pulse, VCC, VCC, VCC);
-- Node name is ':39' = 'preset18758'
-- Equation name is 'preset18758', location is LC019, type is buried.
preset18758 = DFFE( GND $ VCC, bit_pulse, VCC, VCC, VCC);
-- Node name is ':38' = 'preset18759'
-- Equation name is 'preset18759', location is LC026, type is buried.
preset18759 = DFFE( GND $ VCC, bit_pulse, VCC, VCC, VCC);
-- Node name is ':37' = 'preset187510'
-- Equation name is 'preset187510', location is LC025, type is buried.
preset187510 = DFFE( GND $ VCC, bit_pulse, VCC, VCC, VCC);
-- Node name is ':24' = 'q'
-- Equation name is 'q', location is LC050, type is buried.
q = DFFE( _EQ039 $ GND, _EQ040, VCC, VCC, VCC);
_EQ039 = code_sel & m0
# !code_sel & fangbo;
_EQ040 = clock & en_clock;
-- Node name is '|LPM_ADD_SUB:315|addcore:adder|addcore:adder0|result_node3' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC054', type is buried
_LC054 = LCELL( count253 $ _EQ041);
_EQ041 = count250 & count251 & count252;
-- Node name is '|LPM_ADD_SUB:315|addcore:adder|addcore:adder0|result_node4' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC053', type is buried
_LC053 = LCELL( count254 $ _EQ042);
_EQ042 = count250 & count251 & count252 & count253;
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node2' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC029', type is buried
_LC029 = LCELL( count18752 $ _EQ043);
_EQ043 = !count18750 & !count18751;
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node3' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC028', type is buried
_LC028 = LCELL( count18753 $ _EQ044);
_EQ044 = !count18750 & !count18751 & !count18752;
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node4' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC024', type is buried
_LC024 = LCELL( count18754 $ _EQ045);
_EQ045 = !count18750 & !count18751 & !count18752 & !count18753;
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node5' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC023', type is buried
_LC023 = LCELL( count18755 $ _EQ046);
_EQ046 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754;
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node6' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC022', type is buried
_LC022 = LCELL( count18756 $ _EQ047);
_EQ047 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755;
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node7' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC039', type is buried
_LC039 = LCELL( count18757 $ _EQ048);
_EQ048 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756;
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node0' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC043', type is buried
_LC043 = LCELL(!count18758 $ _EQ049);
_EQ049 = _X004;
_X004 = EXP(!count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757);
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node1' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC045', type is buried
_LC045 = LCELL( count18759 $ _EQ050);
_EQ050 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758;
-- Node name is '|LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node2' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC046', type is buried
_LC046 = LCELL( count187510 $ _EQ051);
_EQ051 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759;
-- Shareable expanders that are duplicated in multiple LABs:
-- (none)
Project Information d:\so2006\cpld-pro\quartus6\pll1218\bit_synchronous.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Standard
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'MAX3000A' family
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
PARALLEL_EXPANDERS = off
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SOFT_BUFFER_INSERTION = on
SUBFACTOR_EXTRACTION = on
TURBO_BIT = on
XOR_SYNTHESIS = on
IGNORE_SOFT_BUFFERS = off
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
One-Hot State Machine Encoding = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:00
Partitioner 00:00:00
Fitter 00:00:01
Timing SNF Extractor 00:00:00
Assembler 00:00:00
-------------------------- --------
Total Time 00:00:01
Memory Allocated
-----------------
Peak memory allocated during compilation = 4,196K
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