chip1.fit

扩频通信M序列,编码,通用VHDL语言

-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 06/30/2006 16:29:11      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "chip1"
BEGIN

    DEVICE = "EPM7128ELC84-7";

    "clk"                          : INPUT_PIN  = 83     ;
    "reset"                        : INPUT_PIN  = 12     ; -- LC3
    "t1"                           : INPUT_PIN  = 11     ; -- LC5
    "out"                          : OUTPUT_PIN = 79     ; -- LC125
    "|lpm_add_sub:160|addcore:adder|addcore:adder0|result_node3" : LOCATION   = LC126  ; -- PIN 80
    "|lpm_add_sub:161|addcore:adder|addcore:adder0|result_node3" : LOCATION   = LC124  ;
    ":71"                          : LOCATION   = LC123  ; -- PIN 77  -- flag
    ":114"                         : LOCATION   = LC122  ;  -- n4
    ":115"                         : LOCATION   = LC121  ;  -- n3
    ":116"                         : LOCATION   = LC120  ; -- PIN 76  -- n2
    ":117"                         : LOCATION   = LC119  ;  -- n1
    ":118"                         : LOCATION   = LC118  ; -- PIN 75  -- n0
    ":119"                         : LOCATION   = LC117  ; -- PIN 74  -- c4
    "~128~1"                       : LOCATION   = LC116  ;
    ":129"                         : LOCATION   = LC115  ; -- PIN 73  -- c1
    ":138"                         : LOCATION   = LC114  ;  -- c2
    ":147"                         : LOCATION   = LC113  ;  -- c3
    "~158~1"                       : LOCATION   = LC127  ;

END;

INTERNAL_INFO "chip1"
BEGIN
	DEVICE = EPM7128ELC84-7;
	LC125   : LORAX = "G199R0";
	LC117   : LORAX = "G110R0,PA16R0C7";
	LC122   : LORAX = "G143R0,PA23R0C7";
	LC121   : LORAX = "G142R0,PA25R0C7";
	LC119   : LORAX = "G112R0,PA12R0C7";
	OH4R0P11 : LORAX = "G204R0,PA29R0C7";
	LC123   : LORAX = "G144R0,PA18R0C7";
	LC120   : LORAX = "G113R0,PA10R0C7";
	LC118   : LORAX = "G111R0,PA14R0C7";
	OH2R0P12 : LORAX = "G148R0,PA19R0C7";
	LC124   : LORAX = "G145R0,PA24R0C7";
	LC126   : LORAX = "G200R0,PA32R0C7";
	LC113   : LORAX = "G53R0,PA7R0C7";
	LC114   : LORAX = "G54R0,PA5R0C7";
	LC115   : LORAX = "G55R0,PA3R0C7";
	LC116   : LORAX = "G56R0,PA1R0C7";
	LC127   : LORAX = "G201R0,PA27R0C7";
END;