pci_bridge32.tlg

这是用pci-wishbone核和16450串口核在xilinx的fpga上实现的串口程序

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <19> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <18> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <17> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <16> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <15> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <14> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <13> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <12> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <11> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <10> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <9> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <8> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <7> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <6> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <5> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <4> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <3> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <2> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <1> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":108:42:108:47|Input port bit <0> of am2_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <19> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <18> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <17> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <16> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <15> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <14> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <13> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <12> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <11> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <10> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <9> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <8> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <7> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <6> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <5> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <4> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <3> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <2> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <1> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":109:42:109:47|Input port bit <0> of am3_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <19> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <18> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <17> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <16> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <15> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <14> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <13> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <12> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <11> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <10> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <9> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <8> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <7> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <6> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <5> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <4> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <3> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <2> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <1> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":110:42:110:47|Input port bit <0> of am4_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <19> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <18> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <17> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <16> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <15> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <14> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <13> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <12> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <11> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <10> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <9> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <8> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <7> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <6> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <5> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <4> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <3> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <2> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <1> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":111:42:111:47|Input port bit <0> of am5_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <19> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <18> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <17> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <16> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <15> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <14> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <13> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <12> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <11> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <10> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <9> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <8> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <7> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <6> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <5> of ta0_in[19:0] is unused

@W:"F:\lizheng\FiberOptical\FPGA\PCI_Bridge_Guest_UART\pci_wb_addr_mux.v":112:42:112:47|Input port bit <4> of ta0_in[19:0] is unused