edh_flags.vhd

XAPP299 version 1.0 reference design files

--------------------------------------------------------------------------------
-- edh_flags.v
--
-- SDI EDH flags processor
--
--
--
--                  Author: John F. Snow
--                  Staff Applications Engineer
--
--                  Video Applications
--                  Advanced Products Group
--                  Xilinx, Inc.
--
--                  Copyright (c) 2002 Xilinx, Inc.
--                  All rights reserved
--
--                  Date:   May 8, 2002
--
--                  RESTRICTED RIGHTS LEGEND
--
--      This software has not been published by the author, and 
--      has been disclosed to others for the purpose of enhancing 
--      and promoting design productivity in Xilinx products.
--
--      Therefore use, duplication or disclosure, now and in the 
--      future should give consideration to the productivity 
--      enhancements afforded the user of this code by the author's 
--      efforts.  Thank you for using our products !
--
-- Disclaimer:  THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY 
--              WHATSOEVER AND XILINX SPECIFICALLY DISCLAIMS ANY 
--              IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
--              A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT.
--
-- Revision:
--              May 8, 2002     Release
--
-- Other modules instanced in this design:
--          none
--
--------------------------------------------------------------------------------
-- 
-- This module calculates new values for the EDH flags to be inserted into the
-- next generated EDH packet.
-- 
-- The flags captured from the received EDH packet are combined with the error 
-- flags generated by other modules and by internal EDH flags generated by
-- comparing the received CRC checkwords with the CRC values calculated by the
-- edh_crc module. 
-- 
-- The new flag values are calculated as the edh_gen module generates a new EDH
-- packet. The edh_flags module supplies the EDH flags to the edh_gen module 
-- over a flag bus. The edh_gen module requests which set of EDH flags (ap, ff, 
-- or anc) is supplied over the flag bus with the ap_flag_word, ff_flag_word, 
-- and anc_flag_word signals. The three flag sets are also captured and remain 
-- valid on the ap_flags, ff_flags, and anc_flags output ports through the 
-- following field.
-- 
-- edh flag (error detected here)
-- 
-- The edh flag for the ap and ff flag sets is asserted when the received and
-- calculated CRC values do not match. The edh flag will not be asserted if 
-- either CRC value is not valid or if an error was detected with the received 
-- EDH packet. A packet error is considered to have occurred if the EDH packet 
-- is missing or if the EDH packet contained a format or parity error. The 
-- checksum of the EDH packet is not checked soon enough to allow its 
-- consideration in this flag calculation.
-- 
-- The edh flag for the anc flag set is supplied as an input (anc_edh_local) to
-- this module. This normally comes from the edh_rx module and is asserted if 
-- any ANC packet in the previous field had a parity or checksum error.
-- 
-- eda flag (error detected already)
-- 
-- The eda flag of each of the three flag sets is asserted if either the eda or 
-- the edh flag from the received EDH packet is asserted.
-- 
-- ues flag (unknown error status)
-- 
-- The ues flag for the ap and ff flag set is asserted if the ues flag in the
-- received EDH packet is asserted, if an error is detected in the EDH packet, 
-- or if the corresponding CRC valid bit is not asserted.
-- 
-- The ues flag for the anc flag set is asserted if the ues flag in the anc flag
-- set of the received EDH packet is asserted, if an error is detected in the
-- received EDH packet, or if the anc_ues_local input signal is asserted.
-- 
-- idh flag (internal error detected here)
-- 
-- The idh flag for each flag set is set if the corresponding input signal
-- (ap_idh_local, ff_idh_local, and anc_idh_local), is asserted.
-- 
-- ida flag (internal error detected already)
-- 
-- The ida flag for each flag set is set if the either the idh or ida flags from
-- the received EDH packet are set.
-- 
-- The module has an input signal called receive_mode. If this signal is not
-- asserted, then the way the flags are generated is modified. The module 
-- assumes that no EDH packets are being received by the processor (for example,
-- if this module is at the head end of a video chain). This input effectively 
-- disables received packet errors from causing any of the flags to be asserted.
--

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;

use work.anc_edh_pkg.all;

entity edh_flags is
    port (
        -- inputs
        clk:                in  std_ulogic;     -- clock input
        ce:                 in  std_ulogic;     -- clock enable
        rst:                in  std_ulogic;     -- async reset input
        receive_mode:       in  std_ulogic;     -- asserted if receiver is active
        ap_flag_word:       in  std_ulogic;     -- selects the AP flag word for flag_bus
        ff_flag_word:       in  std_ulogic;     -- selects the FF flag word for flag_bus
        anc_flag_word:      in  std_ulogic;     -- selects the ANC flag word for the flag_bus
        edh_missing:        in  std_ulogic;     -- EDH packet missing from data stream
        edh_parity_err:     in  std_ulogic;     -- EDH packet parity error
        edh_format_err:     in  std_ulogic;     -- EDH packet format error
        rx_ap_crc_valid:    in  std_ulogic;     -- received AP CRC valid bit
        rx_ap_crc:          in  crc16_type;     -- received AP CRC value 
        rx_ff_crc_valid:    in  std_ulogic;     -- received FF CRC valid bit
        rx_ff_crc:          in  crc16_type;     -- received FF CRC value
        rx_ap_flags:        in  edh_flgset_type;-- received AP flag word
        rx_ff_flags:        in  edh_flgset_type;-- received FF flag word
        rx_anc_flags:       in  edh_flgset_type;-- recevied ANC flag word
        anc_edh_local:      in  std_ulogic;     -- local ANC EDH flag input
        anc_idh_local:      in  std_ulogic;     -- local ANC IDH flag input
        anc_ues_local:      in  std_ulogic;     -- local ANC UES flag input
        ap_idh_local:       in  std_ulogic;     -- local AP IDH flag input
        ff_idh_local:       in  std_ulogic;     -- local FF IDH flag input
        calc_ap_crc_valid:  in  std_ulogic;     -- calculated AP CRC valid bit
        calc_ap_crc:        in  crc16_type;     -- calculated AP CRC value
        calc_ff_crc_valid:  in  std_ulogic;     -- calculated FF CRC value
        calc_ff_crc:        in  crc16_type;     -- calculated FF CRC

        -- outputs
        flags:              out edh_flgset_type;-- flag bus output
        ap_flags:           out edh_flgset_type;-- AP flags from last EDH packet sent
        ff_flags:           out edh_flgset_type;-- FF flags from last EDH packet sent
        anc_flags:          out edh_flgset_type);-- ANC flags from last EDH packet sent
end;

architecture synth of edh_flags is

-------------------------------------------------------------------------------
-- Constant definitions
--
-- This set of constants defines the bit positions of the five flags in each
-- flag set.
--
constant EDH_BIT : integer := 0;
constant EDA_BIT : integer := 1;
constant IDH_BIT : integer := 2;
constant IDA_BIT : integer := 3;
constant UES_BIT : integer := 4;

-------------------------------------------------------------------------------
-- Signal definitions
--
signal ap_edh :     std_ulogic;         -- internally generated ap_edh flag
signal ap_ues :     std_ulogic;         -- internally generated ap_ues flag
signal ff_edh :     std_ulogic;         -- internally generated ff_edh flag
signal ff_ues :     std_ulogic;         -- internally generated ff_uew flag
signal packet_err : std_ulogic;         -- asserted on a received EDH packet error
signal flag_bus :   edh_flgset_type;    -- internal flag bus

begin
    
    --
    -- EDH packet error detection
    --
    packet_err <= (edh_missing or edh_parity_err or edh_format_err) and 
                  receive_mode;

    --
    -- AP flag generation
    --
    ap_edh <= '1' when packet_err = '0' and calc_ap_crc_valid = '1' and 
                       rx_ap_crc_valid = '1' and 
                       (calc_ap_crc /= rx_ap_crc) 
              else '0';

    ap_ues <= not rx_ap_crc_valid;

    --
    -- FF flag generation
    --
    ff_edh <= '1' when packet_err = '0' and calc_ff_crc_valid = '1' and 
                       rx_ff_crc_valid = '1' and 
                       (calc_ff_crc /= rx_ff_crc) 
              else '0';

    ff_ues <=  not rx_ff_crc_valid;

    --
    -- flag_bus generation
    --
    flag_bus(EDH_BIT) <= 
        (ap_flag_word and ap_edh) or
        (ff_flag_word and ff_edh) or
        (anc_flag_word and anc_edh_local);

    flag_bus(EDA_BIT) <= 
        (not packet_err) and (
        (ap_flag_word and (rx_ap_flags(EDH_BIT) or rx_ap_flags(EDA_BIT))) or
        (ff_flag_word and (rx_ff_flags(EDH_BIT) or rx_ff_flags(EDA_BIT))) or
        (anc_flag_word and (rx_anc_flags(EDH_BIT) or rx_anc_flags(EDA_BIT))));
                            
    flag_bus(IDH_BIT) <= 
        (ap_flag_word and ap_idh_local) or
        (ff_flag_word and ff_idh_local) or
        (anc_flag_word and anc_idh_local);

    flag_bus(IDA_BIT) <= 
        (not packet_err) and ( 
        (ap_flag_word and (rx_ap_flags(IDH_BIT) or rx_ap_flags(IDA_BIT))) or
        (ff_flag_word and (rx_ff_flags(IDH_BIT) or rx_ff_flags(IDA_BIT))) or
        (anc_flag_word and (rx_anc_flags(IDH_BIT) or rx_anc_flags(IDA_BIT))));
      
    flag_bus(UES_BIT) <= 
        packet_err or
        (ap_flag_word and (ap_ues or rx_ap_flags(UES_BIT))) or 
        (ff_flag_word and (ff_ues or rx_ff_flags(UES_BIT))) or
        (anc_flag_word and (anc_ues_local or rx_anc_flags(UES_BIT)));

    --
    -- flag registers
    --
    -- These register capture the three flag sets as the EDH packet is being
    -- generated and retain the error flag values until the next EDH packet is
    -- generated. This allows the error flag values to be observed by some other
    -- module or processor.
    --
    process(clk,rst)
    begin
        if (rst = '1') then
            ap_flags <= (others => '0');
        elsif (clk'event and clk = '1') then
            if (ce = '1') then
                if (ap_flag_word = '1') then
                    ap_flags <= flag_bus;
                end if;
            end if;
        end if;
    end process;

    process(clk,rst)
    begin
        if (rst = '1') then
            ff_flags <= (others => '0');
        elsif (clk'event and clk = '1') then
            if (ce = '1') then
                if (ff_flag_word = '1') then
                    ff_flags <= flag_bus;
                end if;
            end if;
        end if;
    end process;

    process(clk,rst)
    begin
        if (rst = '1') then
            anc_flags <= (others => '0');
        elsif (clk'event and clk = '1') then
            if (ce = '1') then
                if (anc_flag_word = '1') then
                    anc_flags <= flag_bus;
                end if;
            end if;
        end if;
    end process;

    flags <= flag_bus;

end synth;