tc3tim.asm

8051硬核源码（VHDL）

reset: 	ljmp start                       
i_ext0: ljmp j_ext0                     
	nop                                     
	nop                                     
	nop                                     
	nop                                     
	nop                                     
i_tim0: ljmp j_tim0              
	nop                                     
	nop                                     
	nop                                     
	nop                                     
	nop                                     
i_ext1: ljmp j_ext1                     
	nop                                     
	nop                                     
	nop                                     
	nop                                     
	nop                                     
i_tim1: ljmp j_tim1              
	nop                                     
	nop                                     
	nop                                     
	nop                                     
	nop                                     
i_siu: 	ljmp j_siu                       

start:	mov 0aah,#00h
	mov 0bah,#00h
	mov 09Dh,#00h

	mov sp, #70h                            
	mov tmod, #10011001b  ; both gated, 16 bit
	setb TR0
	setb TR1
loop:   sjmp loop
	
j_ext0: reti                     
                                        
j_tim0: reti                                    
                                        
j_ext1: reti                     
                                        
j_tim1: reti                                    
                                        
j_siu: 	reti                             
	
	end