mc8051.psp

8051硬核源码（VHDL）

#
#
# Precision RTL Synthesis 2003b.41 (Production Release) Sun Sep 28 00:37:21 PDT 2003
# 
# Copyright (c) Mentor Graphics Corporation, 1996-2003, All Rights Reserved.
#                      UNPUBLISHED, LICENSED SOFTWARE.
#           CONFIDENTIAL AND PROPRIETARY INFORMATION WHICH IS THE
#         PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# 
# Running on Windows XP cadek@GC_DELL Service Pack 1 5.01.2600 i1586
# 
#                                  NOTICE
#
# This source code belongs to Mentor Graphics Corporation.  It is considered
# trade secret and is not to be divulged or used by parties who have not
# received written authorization from the owner.
#
#
# Date : Sun Apr 18 07:58:29 2004
# Designer : cadek
#
#


## Working Directory
set_working_dir N:/design/mc8051/syn/precision


## Technology Settings
setup_design -manufacturer Altera -family Cyclone -part EP1C6F256C -speed 8


## Input File Settings
setup_design -arch=
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_p.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/addsub_cy_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/addsub_cy_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/addsub_ovcy_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/addsub_ovcy_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/addsub_core_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/addsub_core_struc.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/alumux_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/alumux_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/comb_divider_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/comb_divider_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/comb_mltplr_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/comb_mltplr_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/control_fsm_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/control_fsm_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/control_mem_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/control_mem_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/dcml_adjust_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/dcml_adjust_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/alucore_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/alucore_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_alu_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_alu_struc.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_siu_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_siu_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_tmrctr_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_tmrctr_rtl.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_control_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_control_struc.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_core_.vhd
add_input_file -format VHDL -work work -compile_time 1082268191 ../../vhdl/mc8051_core_struc.vhd
add_input_file -format {Synopsys Design Constraints} -work work -compile_time 1082268191 mc8051.sdc


## Include File Settings
MGS_Core::add_include_file -compile_time 1082268191 O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_include_file -compile_time 1082268191 O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_include_file -compile_time 1082268191 ../../vhdl/mc8051_p.vhd


## Dependencies
MGS_Core::add_dependency -from ../../vhdl/addsub_core_.vhd -to ../../vhdl/mc8051_p.vhd
MGS_Core::add_dependency -from ../../vhdl/addsub_core_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/addsub_core_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/addsub_cy_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/addsub_cy_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/addsub_ovcy_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/addsub_ovcy_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/alucore_.vhd -to ../../vhdl/mc8051_p.vhd
MGS_Core::add_dependency -from ../../vhdl/alucore_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/alucore_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/alumux_.vhd -to ../../vhdl/mc8051_p.vhd
MGS_Core::add_dependency -from ../../vhdl/alumux_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/alumux_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/comb_divider_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/comb_divider_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/comb_mltplr_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/comb_mltplr_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/control_fsm_.vhd -to ../../vhdl/mc8051_p.vhd
MGS_Core::add_dependency -from ../../vhdl/control_fsm_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/control_fsm_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/control_mem_.vhd -to ../../vhdl/mc8051_p.vhd
MGS_Core::add_dependency -from ../../vhdl/control_mem_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/control_mem_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/dcml_adjust_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/dcml_adjust_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_alu_.vhd -to ../../vhdl/mc8051_p.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_alu_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_alu_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_control_.vhd -to ../../vhdl/mc8051_p.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_control_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_control_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_core_.vhd -to ../../vhdl/mc8051_p.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_core_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_core_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_p.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_p.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_siu_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_siu_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_tmrctr_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd
MGS_Core::add_dependency -from ../../vhdl/mc8051_tmrctr_.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd
MGS_Core::add_dependency -from O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/syn_arit.vhd -to O:/Precision/2003b.41/Mgc_home/pkgs/techdata/vhdl/std_1164.vhd


## Output File Settings
setup_design -basename=mc8051_core


## Design Settings
setup_design -addio
setup_design -vhdl=false
setup_design -verilog=false
setup_design -edif
setup_design -vendor_constraint_file
setup_design -transformations
setup_design -retiming=false
setup_design -advanced_fsm_optimization
setup_design -use_safe_fsm=false
setup_design -encoding=auto
setup_design -resource_sharing
setup_design -array_bounds_check=false
setup_design -transform_tristates=auto
setup_design -frequency=25
setup_design -radhardmethod=
setup_design -input_delay=0
setup_design -output_delay=0
setup_design -search_path=


## Place and Route Settings for Flow 'Quartus II 3.0' Command 'Integrated Place and Route'
setup_place_and_route -flow {Quartus II 3.0} -command {Integrated Place and Route} -install_dir {$QUARTUS_HOME}
setup_place_and_route -flow {Quartus II 3.0} -command {Integrated Place and Route} -no_exec 0
setup_place_and_route -flow {Quartus II 3.0} -command {Integrated Place and Route} -ba_format Verilog


## Place and Route Settings for Flow 'Quartus II 3.0' Command 'Generate Vendor Constraint File'
setup_place_and_route -flow {Quartus II 3.0} -command {Generate Vendor Constraint File} -no_exec 0


## Place and Route Settings for Flow 'Quartus II' Command 'Integrated Place and Route'
setup_place_and_route -flow {Quartus II} -command {Integrated Place and Route} -install_dir {$QUARTUS_HOME}
setup_place_and_route -flow {Quartus II} -command {Integrated Place and Route} -no_exec 0
setup_place_and_route -flow {Quartus II} -command {Integrated Place and Route} -ba_format VHDL


## Place and Route Settings for Flow 'Quartus II' Command 'Generate Vendor Constraint File'
setup_place_and_route -flow {Quartus II} -command {Generate Vendor Constraint File} -no_exec 0


## Design state information
set_state synthesized

## Active Implementation
setup_design -impl mc8051_core_impl_1