pc104_cpld.fit.eqn

是关于对数据采集卡的基于PC104总线的读写程序

--L1_dffs[5] is AdToFifo:inst6|lpm_counter:qn_rtl_0|dffs[5] at LC27
L1_dffs[5]_p1_out = L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[0] & L1_dffs[1];
L1_dffs[5]_or_out = L1_dffs[5]_p1_out;
L1_dffs[5]_reg_input = L1_dffs[5]_or_out;
L1_dffs[5] = TFFE(L1_dffs[5]_reg_input, GLOBAL(Clk), !C1L51, , E1_Flag);


--D1_qn[1] is StartAdMode:inst4|qn[1] at LC46
D1_qn[1]_p1_out = !D1L1 & B1_IOCtrlReg[0] & D1_qn[0] & B1_IOCtrlReg[2];
D1_qn[1]_p3_out = !B1_IOCtrlReg[0] & D1_qn[0] & B1_IOCtrlReg[2] & B1_IOCtrlReg[1];
D1_qn[1]_or_out = D1_qn[1]_p1_out # D1_qn[1]_p3_out;
D1_qn[1]_reg_input = D1_qn[1]_or_out;
D1_qn[1] = TFFE(D1_qn[1]_reg_input, GLOBAL(Clk), !C1L31, , );


--L1_dffs[6] is AdToFifo:inst6|lpm_counter:qn_rtl_0|dffs[6] at LC25
L1_dffs[6]_p1_out = L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[0] & L1_dffs[1];
L1_dffs[6]_or_out = L1_dffs[6]_p1_out;
L1_dffs[6]_reg_input = L1_dffs[6]_or_out;
L1_dffs[6] = TFFE(L1_dffs[6]_reg_input, GLOBAL(Clk), !C1L51, , E1_Flag);


--L1_dffs[7] is AdToFifo:inst6|lpm_counter:qn_rtl_0|dffs[7] at LC24
L1_dffs[7]_p1_out = L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[0] & L1_dffs[1];
L1_dffs[7]_or_out = L1_dffs[7]_p1_out;
L1_dffs[7]_reg_input = L1_dffs[7]_or_out;
L1_dffs[7] = TFFE(L1_dffs[7]_reg_input, GLOBAL(Clk), !C1L51, , E1_Flag);


--D1_qn[2] is StartAdMode:inst4|qn[2] at LC99
D1_qn[2]_p1_out = !D1L1 & B1_IOCtrlReg[0] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2];
D1_qn[2]_p3_out = !B1_IOCtrlReg[0] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & B1_IOCtrlReg[1];
D1_qn[2]_or_out = D1_qn[2]_p1_out # D1_qn[2]_p3_out;
D1_qn[2]_reg_input = D1_qn[2]_or_out;
D1_qn[2] = TFFE(D1_qn[2]_reg_input, GLOBAL(Clk), !C1L21, , );


--E1_Flag is AdToFifo:inst6|Flag at LC30
E1_Flag_p1_out = !E1_Flag & !Int[3] & !Int[2] & !Int[1] & !Int[0];
E1_Flag_p3_out = E1_Flag & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[0] & L1_dffs[1];
E1_Flag_or_out = E1_Flag_p1_out # E1_Flag_p3_out;
E1_Flag_reg_input = E1_Flag_or_out;
E1_Flag = TFFE(E1_Flag_reg_input, GLOBAL(Clk), !C1L51, , );


--L1_dffs[0] is AdToFifo:inst6|lpm_counter:qn_rtl_0|dffs[0] at LC26
L1_dffs[0]_reg_input = VCC;
L1_dffs[0] = TFFE(L1_dffs[0]_reg_input, GLOBAL(Clk), !C1L51, , E1_Flag);


--K3L1 is StartAdMode:inst4|lpm_add_sub:i_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[3]~8 at LC82
K3L1_p1_out = !D1_qn[2] & !D1_qn[1] & D1_qn[0];
K3L1_or_out = !D1_qn[3];
K3L1 = K3L1_p1_out $ K3L1_or_out;


--E1L4 is AdToFifo:inst6|i73~107 at LC21
E1L4_p1_out = !L1_dffs[2] & E1L4;
E1L4_p2_out = E1L4 & !L1_dffs[0];
E1L4_p3_out = E1L4 & L1_dffs[3];
E1L4_p4_out = E1L4 & L1_dffs[1];
E1L4_or_out = E1L5 # RESET # E1L4_p1_out # E1L4_p2_out # E1L4_p3_out # E1L4_p4_out;
E1L4 = E1L4_or_out;


--E1L2 is AdToFifo:inst6|i72~123 at LC19
E1L2_p1_out = !L1_dffs[2] & E1L2;
E1L2_p2_out = E1L2 & L1_dffs[0];
E1L2_p3_out = E1L2 & L1_dffs[3];
E1L2_p4_out = E1L2 & L1_dffs[1];
E1L2_or_out = E1L3 # RESET # E1L2_p1_out # E1L2_p2_out # E1L2_p3_out # E1L2_p4_out;
E1L2 = E1L2_or_out;


--D1_qn[3] is StartAdMode:inst4|qn[3] at LC114
D1_qn[3]_p0_out = !D1_qn[3] & !D1_qn[9] & !D1_qn[8] & !D1_qn[5] & !D1_qn[4] & !D1_qn[7] & !D1_qn[6] & !D1_qn[2] & !D1_qn[1] & D1_qn[0];
D1_qn[3]_p1_out = K3L1 & B1_IOCtrlReg[2] & !B1_IOCtrlReg[0] & B1_IOCtrlReg[1];
D1_qn[3]_p3_out = K3L1 & B1_IOCtrlReg[2] & !D1L1 & B1_IOCtrlReg[0];
D1_qn[3]_p4_out = !D1_qn[3] & K3L1;
D1_qn[3]_or_out = D1L2 # D1_qn[3]_p0_out # D1_qn[3]_p1_out # D1_qn[3]_p3_out # D1_qn[3]_p4_out;
D1_qn[3]_reg_input = !(D1_qn[3]_or_out);
D1_qn[3] = DFFE(D1_qn[3]_reg_input, GLOBAL(Clk), !C1L41, , );


--E1L01 is AdToFifo:inst6|i97~5 at LC11
E1L01_p1_out = !E1L4 & C1L8 & !RESET;
E1L01_or_out = E1L01_p1_out;
E1L01 = !(E1L01_or_out);


--E1L6 is AdToFifo:inst6|i85~30 at LC17
E1L6_p1_out = !E1L2 & L1_dffs[7] & L1_dffs[6] & C1L8 & !RESET;
E1L6_or_out = E1L6_p1_out;
E1L6 = !(E1L6_or_out);


--E1L8 is AdToFifo:inst6|i87~9 at LC1
E1L8_p1_out = !L1_dffs[7] & L1_dffs[6] & !E1L2 & C1L8 & !RESET;
E1L8_or_out = E1L8_p1_out;
E1L8 = !(E1L8_or_out);


--E1L7 is AdToFifo:inst6|i86~10 at LC22
E1L7_p1_out = L1_dffs[7] & !L1_dffs[6] & !E1L2 & C1L8 & !RESET;
E1L7_or_out = E1L7_p1_out;
E1L7 = !(E1L7_or_out);


--E1L9 is AdToFifo:inst6|i88~8 at LC16
E1L9_p1_out = !L1_dffs[7] & !L1_dffs[6] & !E1L2 & C1L8 & !RESET;
E1L9_or_out = E1L9_p1_out;
E1L9 = !(E1L9_or_out);


--D1_qn[4] is StartAdMode:inst4|qn[4] at LC81
D1_qn[4]_p1_out = !D1L1 & B1_IOCtrlReg[0] & D1_qn[3] & D1_qn[0] & !D1_qn[1] & !D1_qn[2] & B1_IOCtrlReg[2];
D1_qn[4]_p3_out = !B1_IOCtrlReg[0] & D1_qn[3] & D1_qn[0] & !D1_qn[1] & !D1_qn[2] & B1_IOCtrlReg[2] & B1_IOCtrlReg[1];
D1_qn[4]_or_out = D1_qn[4]_p1_out # D1_qn[4]_p3_out;
D1_qn[4]_reg_input = D1_qn[4]_or_out;
D1_qn[4] = TFFE(D1_qn[4]_reg_input, GLOBAL(Clk), !C1L11, , );


--D1_qn[5] is StartAdMode:inst4|qn[5] at LC98
D1_qn[5]_p0_out = !B1_IOCtrlReg[0] & D1_qn[4] & D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & B1_IOCtrlReg[1];
D1_qn[5]_p1_out = !D1_qn[9] & !D1_qn[8] & !D1_qn[7] & !D1_qn[6] & !D1L1 & B1_IOCtrlReg[0] & !D1_qn[4] & !D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & !D1_qn[5];
D1_qn[5]_p3_out = !D1_qn[9] & !D1_qn[8] & !D1_qn[7] & !D1_qn[6] & !B1_IOCtrlReg[0] & !D1_qn[4] & !D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & !D1_qn[5] & B1_IOCtrlReg[1];
D1_qn[5]_p4_out = !D1L1 & B1_IOCtrlReg[0] & D1_qn[4] & D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2];
D1_qn[5]_or_out = D1_qn[5]_p0_out # D1_qn[5]_p1_out # D1_qn[5]_p3_out # D1_qn[5]_p4_out;
D1_qn[5]_reg_input = D1_qn[5]_or_out;
D1_qn[5] = TFFE(D1_qn[5]_reg_input, GLOBAL(Clk), !C1L21, , );


--D1_qn[6] is StartAdMode:inst4|qn[6] at LC89
D1_qn[6]_p0_out = !B1_IOCtrlReg[0] & !D1_qn[5] & D1_qn[4] & D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & B1_IOCtrlReg[1];
D1_qn[6]_p1_out = !D1_qn[9] & !D1_qn[8] & !D1_qn[7] & !D1L1 & B1_IOCtrlReg[0] & !D1_qn[5] & !D1_qn[4] & !D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & !D1_qn[6];
D1_qn[6]_p3_out = !D1_qn[9] & !D1_qn[8] & !D1_qn[7] & !B1_IOCtrlReg[0] & !D1_qn[5] & !D1_qn[4] & !D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & !D1_qn[6] & B1_IOCtrlReg[1];
D1_qn[6]_p4_out = !D1L1 & B1_IOCtrlReg[0] & !D1_qn[5] & D1_qn[4] & D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2];
D1_qn[6]_or_out = D1_qn[6]_p0_out # D1_qn[6]_p1_out # D1_qn[6]_p3_out # D1_qn[6]_p4_out;
D1_qn[6]_reg_input = D1_qn[6]_or_out;
D1_qn[6] = TFFE(D1_qn[6]_reg_input, GLOBAL(Clk), !C1L11, , );


--D1_qn[7] is StartAdMode:inst4|qn[7] at LC97
D1_qn[7]_p0_out = !B1_IOCtrlReg[0] & !D1_qn[6] & !D1_qn[5] & D1_qn[4] & D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & B1_IOCtrlReg[1];
D1_qn[7]_p1_out = !D1_qn[9] & !D1_qn[8] & !D1L1 & B1_IOCtrlReg[0] & !D1_qn[6] & !D1_qn[5] & !D1_qn[4] & !D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & !D1_qn[7];
D1_qn[7]_p3_out = !D1_qn[9] & !D1_qn[8] & !B1_IOCtrlReg[0] & !D1_qn[6] & !D1_qn[5] & !D1_qn[4] & !D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & !D1_qn[7] & B1_IOCtrlReg[1];
D1_qn[7]_p4_out = !D1L1 & B1_IOCtrlReg[0] & !D1_qn[6] & !D1_qn[5] & D1_qn[4] & D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2];
D1_qn[7]_or_out = D1_qn[7]_p0_out # D1_qn[7]_p1_out # D1_qn[7]_p3_out # D1_qn[7]_p4_out;
D1_qn[7]_reg_input = D1_qn[7]_or_out;
D1_qn[7] = TFFE(D1_qn[7]_reg_input, GLOBAL(Clk), !C1L21, , );


--D1_qn[8] is StartAdMode:inst4|qn[8] at LC126
D1_qn[8]_p0_out = !B1_IOCtrlReg[0] & !D1_qn[7] & !D1_qn[6] & !D1_qn[5] & D1_qn[4] & D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & B1_IOCtrlReg[1];
D1_qn[8]_p1_out = !D1_qn[9] & !D1L1 & B1_IOCtrlReg[0] & !D1_qn[7] & !D1_qn[6] & !D1_qn[5] & !D1_qn[4] & !D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & !D1_qn[8];
D1_qn[8]_p3_out = !D1_qn[9] & !B1_IOCtrlReg[0] & !D1_qn[7] & !D1_qn[6] & !D1_qn[5] & !D1_qn[4] & !D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2] & !D1_qn[8] & B1_IOCtrlReg[1];
D1_qn[8]_p4_out = !D1L1 & B1_IOCtrlReg[0] & !D1_qn[7] & !D1_qn[6] & !D1_qn[5] & D1_qn[4] & D1_qn[3] & !D1_qn[2] & !D1_qn[1] & D1_qn[0] & B1_IOCtrlReg[2];
D1_qn[8]_or_out = D1_qn[8]_p0_out # D1_qn[8]_p1_out # D1_qn[8]_p3_out # D1_qn[8]_p4_out;
D1_qn[8]_reg_input = D1_qn[8]_or_out;
D1_qn[8] = TFFE(D1_qn[8]_reg_input, GLOBAL(Clk), !C1L41, , );


--D1_qn[9] is StartAdMode:inst4|qn[9] at LC93
D1_qn[9]_p0_out = !B1_IOCtrlReg[0] & !D1_qn[8] & D1_qn[0] & D1_qn[3] & D1_qn[4] & !D1_qn[1] & !D1_qn[2] & !D1_qn[5] & !D1_qn[6] & !D1_qn[7] & B1_IOCtrlReg[2] & B1_IOCtrlReg[1];
D1_qn[9]_p1_out = !D1L1 & B1_IOCtrlReg[0] & !D1_qn[8] & D1_qn[0] & !D1_qn[3] & !D1_qn[4] & !D1_qn[1] & !D1_qn[2] & !D1_qn[5] & !D1_qn[6] & !D1_qn[7] & B1_IOCtrlReg[2] & !D1_qn[9];
D1_qn[9]_p3_out = !B1_IOCtrlReg[0] & !D1_qn[8] & D1_qn[0] & !D1_qn[3] & !D1_qn[4] & !D1_qn[1] & !D1_qn[2] & !D1_qn[5] & !D1_qn[6] & !D1_qn[7] & B1_IOCtrlReg[2] & !D1_qn[9] & B1_IOCtrlReg[1];
D1_qn[9]_p4_out = !D1L1 & B1_IOCtrlReg[0] & !D1_qn[8] & D1_qn[0] & D1_qn[3] & D1_qn[4] & !D1_qn[1] & !D1_qn[2] & !D1_qn[5] & !D1_qn[6] & !D1_qn[7] & B1_IOCtrlReg[2];
D1_qn[9]_or_out = D1_qn[9]_p0_out # D1_qn[9]_p1_out # D1_qn[9]_p3_out # D1_qn[9]_p4_out;
D1_qn[9]_reg_input = D1_qn[9]_or_out;
D1_qn[9] = TFFE(D1_qn[9]_reg_input, GLOBAL(Clk), !C1L11, , );


--D1L3 is StartAdMode:inst4|i68~0 at LC14
D1L3_p1_out = D1_qn[9] & D1_qn[8] & D1_qn[7] & D1_qn[6] & D1_qn[5] & !D1_qn[4] & !D1_qn[3];
D1L3_or_out = D1L3_p1_out;
D1L3 = !(D1L3_or_out);


--B1L7 is RegAndIntMode:inst|i67~247 at LC55
B1L7_p1_out = FF & !IOR & !AEN & !SA[0] & !SA[1] & !SA[3] & SA[2] & !SA[4] & !SA[5] & !SA[6] & !SA[7] & SA[9] & SA[8] & !B1_IOCtrlReg[2];
B1L7 = B1L7_p1_out;


--B1L11 is RegAndIntMode:inst|i71~245 at LC52
B1L11_p1_out = EF & !IOR & !AEN & !SA[0] & !SA[1] & !SA[3] & SA[2] & !SA[4] & !SA[5] & !SA[6] & !SA[7] & SA[9] & SA[8] & !B1_IOCtrlReg[0];
B1L11 = B1L11_p1_out;


--E1L5 is AdToFifo:inst6|i73~109 at LC20
E1L5_p1_out = !IOW & !SA[0] & !AEN & !SA[1] & !SA[3] & SA[2] & !SA[4] & !SA[5] & !SA[6] & !SA[7] & SA[9] & SA[8];
E1L5_p2_out = !L1_dffs[2] & !L1_dffs[0] & L1_dffs[3] & !L1_dffs[1];
E1L5 = E1L5_p1_out # E1L5_p2_out;


--E1L3 is AdToFifo:inst6|i72~125 at LC18
E1L3_p1_out = !IOW & !SA[0] & !AEN & !SA[1] & !SA[3] & SA[2] & !SA[4] & !SA[5] & !SA[6] & !SA[7] & SA[9] & SA[8];
E1L3_p2_out = !L1_dffs[2] & L1_dffs[0] & L1_dffs[3] & !L1_dffs[1];
E1L3 = E1L3_p1_out # E1L3_p2_out;


--D1L2 is StartAdMode:inst4|i29~48 at LC113
D1L2_p1_out = !D1_qn[3] & !B1_IOCtrlReg[0] & !B1_IOCtrlReg[1];
D1L2_p2_out = !D1_qn[3] & D1L1 & B1_IOCtrlReg[0];
D1L2_p3_out = !D1_qn[3] & !B1_IOCtrlReg[2];
D1L2 = D1L2_p1_out # D1L2_p2_out # D1L2_p3_out;


--~GND~0 is ~GND~0 at LC125
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--C1L8 is AddressDecoder:inst3|i188~7sexpbal at LC23
C1L8_p1_out = !IOW & !SA[0] & !AEN & !SA[1] & !SA[3] & SA[2] & !SA[4] & !SA[5] & !SA[6] & !SA[7] & SA[9] & SA[8];
C1L8_or_out = C1L8_p1_out;
C1L8 = !(C1L8_or_out);


--IOR is IOR at Pin_41
--operation mode is input

IOR = INPUT();


--IOW is IOW at Pin_40
--operation mode is input

IOW = INPUT();


--AEN is AEN at Pin_37
--operation mode is input

AEN = INPUT();


--SBHE is SBHE at Pin_36
--operation mode is input

SBHE = INPUT();


--RESET is RESET at Pin_24
--operation mode is input

RESET = INPUT();


--SA[9] is SA[9] at Pin_42
--operation mode is input

SA[9] = INPUT();


--SA[8] is SA[8] at Pin_44
--operation mode is input

SA[8] = INPUT();


--SA[7] is SA[7] at Pin_45
--operation mode is input

SA[7] = INPUT();


--SA[6] is SA[6] at Pin_46
--operation mode is input

SA[6] = INPUT();


--SA[5] is SA[5] at Pin_47
--operation mode is input

SA[5] = INPUT();


--SA[4] is SA[4] at Pin_48
--operation mode is input

SA[4] = INPUT();


--SA[3] is SA[3] at Pin_49
--operation mode is input

SA[3] = INPUT();


--SA[2] is SA[2] at Pin_50
--operation mode is input

SA[2] = INPUT();


--SA[1] is SA[1] at Pin_52
--operation mode is input