lcdmddr.map.eqn

128×64单色点阵LCD的quartus工程文件

--B1_en is lcdmpddr:inst|en
--operation mode is normal

B1_en_lut_out = B1_stks[1] & B1L42 & (B1L73 # B1L93);
B1_en = DFFEA(B1_en_lut_out, F1_safe_q[15], VCC, , !clear, , );


--B1_r_w is lcdmpddr:inst|r_w
--operation mode is normal

B1_r_w_lut_out = !B1_stks[1] & !B1_stks[2] & !B1_stks[0];
B1_r_w = DFFEA(B1_r_w_lut_out, F1_safe_q[15], VCC, , !clear, , );


--B1_d_i is lcdmpddr:inst|d_i
--operation mode is normal

B1_d_i_lut_out = !H1_q_a[8] & !B1_cntp[1] & B1_cntp[0] & B1_cntp[2];
B1_d_i = DFFEA(B1_d_i_lut_out, F1_safe_q[15], VCC, , , , );


--B1_db[7] is lcdmpddr:inst|db[7]
--operation mode is normal

B1_db[7]_lut_out = B1_cntp[2] & (B1_cntp[1] & B1_db[7] # !B1_cntp[1] & B1L23);
B1_db[7] = DFFEA(B1_db[7]_lut_out, F1_safe_q[15], VCC, , , , );


--B1_db[6] is lcdmpddr:inst|db[6]
--operation mode is normal

B1_db[6]_lut_out = B1_db[6] & (B1L43 # B1L33 & H1_q_a[6]) # !B1_db[6] & B1L33 & H1_q_a[6];
B1_db[6] = DFFEA(B1_db[6]_lut_out, F1_safe_q[15], VCC, , , , );


--B1_db[5] is lcdmpddr:inst|db[5]
--operation mode is normal

B1_db[5]_lut_out = B1L62 & (B1_db[5] # !B1_cntp[1]) # !B1L62 & B1_db[5] & B1_cntp[1];
B1_db[5]_sload_eqn = (!B1_cntp[2] & B1L52) # (B1_cntp[2] & B1_db[5]_lut_out);
B1_db[5] = DFFEA(B1_db[5]_sload_eqn, F1_safe_q[15], VCC, , , , );


--B1_db[4] is lcdmpddr:inst|db[4]
--operation mode is normal

B1_db[4]_lut_out = B1L72 & (B1_db[4] # !B1_cntp[1]) # !B1L72 & B1_db[4] & B1_cntp[1];
B1_db[4]_sload_eqn = (!B1_cntp[2] & B1L52) # (B1_cntp[2] & B1_db[4]_lut_out);
B1_db[4] = DFFEA(B1_db[4]_sload_eqn, F1_safe_q[15], VCC, , , , );


--B1_db[3] is lcdmpddr:inst|db[3]
--operation mode is normal

B1_db[3]_lut_out = B1L82 & (B1_db[3] # !B1_cntp[1]) # !B1L82 & B1_db[3] & B1_cntp[1];
B1_db[3]_sload_eqn = (!B1_cntp[2] & B1L8) # (B1_cntp[2] & B1_db[3]_lut_out);
B1_db[3] = DFFEA(B1_db[3]_sload_eqn, F1_safe_q[15], VCC, , , , );


--B1_db[2] is lcdmpddr:inst|db[2]
--operation mode is normal

B1_db[2]_lut_out = B1L92 & (B1_db[2] # !B1_cntp[1]) # !B1L92 & B1_db[2] & B1_cntp[1];
B1_db[2]_sload_eqn = (!B1_cntp[2] & B1L1) # (B1_cntp[2] & B1_db[2]_lut_out);
B1_db[2] = DFFEA(B1_db[2]_sload_eqn, F1_safe_q[15], VCC, , , , );


--B1_db[1] is lcdmpddr:inst|db[1]
--operation mode is normal

B1_db[1]_lut_out = B1L03 & (B1_db[1] # !B1_cntp[1]) # !B1L03 & B1_db[1] & B1_cntp[1];
B1_db[1]_sload_eqn = (!B1_cntp[2] & B1L1) # (B1_cntp[2] & B1_db[1]_lut_out);
B1_db[1] = DFFEA(B1_db[1]_sload_eqn, F1_safe_q[15], VCC, , , , );


--B1_db[0] is lcdmpddr:inst|db[0]
--operation mode is normal

B1_db[0]_lut_out = B1L13 & (B1_db[0] # !B1_cntp[1]) # !B1L13 & B1_db[0] & B1_cntp[1];
B1_db[0]_sload_eqn = (!B1_cntp[2] & B1L2) # (B1_cntp[2] & B1_db[0]_lut_out);
B1_db[0] = DFFEA(B1_db[0]_sload_eqn, F1_safe_q[15], VCC, , , , );


--B1_stks[1] is lcdmpddr:inst|stks[1]
--operation mode is normal

B1_stks[1]_lut_out = B1_stks[0] & B1L95 & !B1_stks[2] & !B1_stks[3];
B1_stks[1] = DFFEA(B1_stks[1]_lut_out, F1_safe_q[15], VCC, , , , );


--E1_safe_q[3] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[3]
--operation mode is arithmetic

E1_safe_q[3]_carry_eqn = E1L6;
E1_safe_q[3]_lut_out = E1_safe_q[3] $ (B1L33 & E1_safe_q[3]_carry_eqn);
E1_safe_q[3]_reg_input = !clear & E1_safe_q[3]_lut_out;
E1_safe_q[3] = DFFEA(E1_safe_q[3]_reg_input, B1L4, VCC, , , , );

--E1L8 is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|counter_cella3~COUT
--operation mode is arithmetic

E1L8 = CARRY(!E1L6 # !E1_safe_q[3]);


--E1_safe_q[2] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[2]
--operation mode is arithmetic

E1_safe_q[2]_carry_eqn = E1L4;
E1_safe_q[2]_lut_out = E1_safe_q[2] $ (B1L33 & !E1_safe_q[2]_carry_eqn);
E1_safe_q[2]_reg_input = !clear & E1_safe_q[2]_lut_out;
E1_safe_q[2] = DFFEA(E1_safe_q[2]_reg_input, B1L4, VCC, , , , );

--E1L6 is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

E1L6 = CARRY(E1_safe_q[2] & !E1L4);


--E1_safe_q[4] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[4]
--operation mode is arithmetic

E1_safe_q[4]_carry_eqn = E1L8;
E1_safe_q[4]_lut_out = E1_safe_q[4] $ (B1L33 & !E1_safe_q[4]_carry_eqn);
E1_safe_q[4]_reg_input = !clear & E1_safe_q[4]_lut_out;
E1_safe_q[4] = DFFEA(E1_safe_q[4]_reg_input, B1L4, VCC, , , , );

--E1L01 is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|counter_cella4~COUT
--operation mode is arithmetic

E1L01 = CARRY(E1_safe_q[4] & !E1L8);


--E1_safe_q[5] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5]
--operation mode is arithmetic

E1_safe_q[5]_carry_eqn = E1L01;
E1_safe_q[5]_lut_out = E1_safe_q[5] $ (B1L33 & E1_safe_q[5]_carry_eqn);
E1_safe_q[5]_reg_input = !clear & E1_safe_q[5]_lut_out;
E1_safe_q[5] = DFFEA(E1_safe_q[5]_reg_input, B1L4, VCC, , , , );

--E1L21 is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|counter_cella5~COUT
--operation mode is arithmetic

E1L21 = CARRY(!E1L01 # !E1_safe_q[5]);


--B1L32 is lcdmpddr:inst|LessThan~170
--operation mode is normal

B1L32 = !E1_safe_q[4] & !E1_safe_q[5] & (!E1_safe_q[2] # !E1_safe_q[3]);


--E1_safe_q[6] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[6]
--operation mode is arithmetic

E1_safe_q[6]_carry_eqn = E1L21;
E1_safe_q[6]_lut_out = E1_safe_q[6] $ (B1L33 & !E1_safe_q[6]_carry_eqn);
E1_safe_q[6]_reg_input = !clear & E1_safe_q[6]_lut_out;
E1_safe_q[6] = DFFEA(E1_safe_q[6]_reg_input, B1L4, VCC, , , , );

--E1L41 is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|counter_cella6~COUT
--operation mode is arithmetic

E1L41 = CARRY(E1_safe_q[6] & !E1L21);


--E1_safe_q[7] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[7]
--operation mode is arithmetic

E1_safe_q[7]_carry_eqn = E1L41;
E1_safe_q[7]_lut_out = E1_safe_q[7] $ (B1L33 & E1_safe_q[7]_carry_eqn);
E1_safe_q[7]_reg_input = !clear & E1_safe_q[7]_lut_out;
E1_safe_q[7] = DFFEA(E1_safe_q[7]_reg_input, B1L4, VCC, , , , );

--E1L61 is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|counter_cella7~COUT
--operation mode is arithmetic

E1L61 = CARRY(!E1L41 # !E1_safe_q[7]);


--E1_safe_q[8] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[8]
--operation mode is normal

E1_safe_q[8]_carry_eqn = E1L61;
E1_safe_q[8]_lut_out = E1_safe_q[8] $ (B1L33 & !E1_safe_q[8]_carry_eqn);
E1_safe_q[8]_reg_input = !clear & E1_safe_q[8]_lut_out;
E1_safe_q[8] = DFFEA(E1_safe_q[8]_reg_input, B1L4, VCC, , , , );


--B1L42 is lcdmpddr:inst|LessThan~171
--operation mode is normal

B1L42 = B1L32 & !E1_safe_q[6] # !E1_safe_q[8] # !E1_safe_q[7];


--B1L53 is lcdmpddr:inst|process2~193
--operation mode is normal

B1L53 = !E1_safe_q[4] & !E1_safe_q[5] & !E1_safe_q[3];


--E1_safe_q[0] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[0]
--operation mode is arithmetic

E1_safe_q[0]_lut_out = E1_safe_q[0] $ B1L33;
E1_safe_q[0]_reg_input = !clear & E1_safe_q[0]_lut_out;
E1_safe_q[0] = DFFEA(E1_safe_q[0]_reg_input, B1L4, VCC, , , , );

--E1L2 is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

E1L2 = CARRY(E1_safe_q[0]);


--E1_safe_q[1] is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[1]
--operation mode is arithmetic

E1_safe_q[1]_carry_eqn = E1L2;
E1_safe_q[1]_lut_out = E1_safe_q[1] $ (B1L33 & E1_safe_q[1]_carry_eqn);
E1_safe_q[1]_reg_input = !clear & E1_safe_q[1]_lut_out;
E1_safe_q[1] = DFFEA(E1_safe_q[1]_reg_input, B1L4, VCC, , , , );

--E1L4 is lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

E1L4 = CARRY(!E1L2 # !E1_safe_q[1]);


--B1L63 is lcdmpddr:inst|process2~194
--operation mode is normal

B1L63 = B1L53 & (!E1_safe_q[0] & !E1_safe_q[1] # !E1_safe_q[2]);


--B1L73 is lcdmpddr:inst|process2~195
--operation mode is normal

B1L73 = !E1_safe_q[7] & !E1_safe_q[8] & (B1L63 # !E1_safe_q[6]);


--B1L83 is lcdmpddr:inst|process2~196
--operation mode is normal

B1L83 = E1_safe_q[2] & E1_safe_q[1] # !B1L53;


--B1L93 is lcdmpddr:inst|process2~197
--operation mode is normal

B1L93 = E1_safe_q[8] & (E1_safe_q[7] # E1_safe_q[6] & B1L83);


--F1_safe_q[15] is lcdmpddr:inst|lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[15]
--operation mode is arithmetic

F1_safe_q[15]_carry_eqn = F1L03;
F1_safe_q[15]_lut_out = F1_safe_q[15] $ F1_safe_q[15]_carry_eqn;
F1_safe_q[15]_reg_input = !clear & F1_safe_q[15]_lut_out;
F1_safe_q[15] = DFFEA(F1_safe_q[15]_reg_input, sclk, VCC, , , , );

--F1L23 is lcdmpddr:inst|lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella15~COUT
--operation mode is arithmetic

F1L23 = CARRY(!F1L03 # !F1_safe_q[15]);


--B1_stks[2] is lcdmpddr:inst|stks[2]
--operation mode is normal

B1_stks[2]_lut_out = B1_stks[1] & B1L05 & !clear & !B1_stks[3];
B1_stks[2] = DFFEA(B1_stks[2]_lut_out, F1_safe_q[15], VCC, , , , );


--B1_stks[0] is lcdmpddr:inst|stks[0]
--operation mode is normal

B1_stks[0]_lut_out = B1L95 & B1L06 & !B1_stks[2] & !B1_stks[0];
B1_stks[0] = DFFEA(B1_stks[0]_lut_out, F1_safe_q[15], VCC, , , , );


--H1_q_a[8] is pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|q_a[8]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 9
--Port A Input: Registered, Port A Output: Un-registered
H1_q_a[8]_PORT_A_address = BUS(B1L14, B1L24, B1L34, B1L44, B1L54, B1L64, B1L74, B1L84);
H1_q_a[8]_PORT_A_address_reg = DFFE(H1_q_a[8]_PORT_A_address, H1_q_a[8]_clock_0, , , );
H1_q_a[8]_clock_0 = sclk;
H1_q_a[8]_PORT_A_data_out = MEMORY(, , H1_q_a[8]_PORT_A_address_reg, , , , , , H1_q_a[8]_clock_0, , , , , );
H1_q_a[8] = H1_q_a[8]_PORT_A_data_out[0];


--B1_cntp[1] is lcdmpddr:inst|cntp[1]
--operation mode is normal

B1_cntp[1]_lut_out = B1L1;
B1_cntp[1] = DFFEA(B1_cntp[1]_lut_out, F1_safe_q[15], VCC, , B1L04, , );


--B1_cntp[0] is lcdmpddr:inst|cntp[0]
--operation mode is normal

B1_cntp[0]_lut_out = !B1_cntp[0];
B1_cntp[0] = DFFEA(B1_cntp[0]_lut_out, F1_safe_q[15], VCC, , B1L04, , );


--B1_cntp[2] is lcdmpddr:inst|cntp[2]
--operation mode is normal

B1_cntp[2]_lut_out = !B1_cntp[2];
B1_cntp[2] = DFFEA(B1_cntp[2]_lut_out, F1_safe_q[15], VCC, , B1L01, , );


--H1_q_a[7] is pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|q_a[7]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 9
--Port A Input: Registered, Port A Output: Un-registered
H1_q_a[7]_PORT_A_address = BUS(B1L14, B1L24, B1L34, B1L44, B1L54, B1L64, B1L74, B1L84);
H1_q_a[7]_PORT_A_address_reg = DFFE(H1_q_a[7]_PORT_A_address, H1_q_a[7]_clock_0, , , );
H1_q_a[7]_clock_0 = sclk;
H1_q_a[7]_PORT_A_data_out = MEMORY(, , H1_q_a[7]_PORT_A_address_reg, , , , , , H1_q_a[7]_clock_0, , , , , );
H1_q_a[7] = H1_q_a[7]_PORT_A_data_out[0];


--B1L23 is lcdmpddr:inst|Mux~259
--operation mode is normal

B1L23 = H1_q_a[7] # !B1_cntp[0];


--B1L33 is lcdmpddr:inst|Mux~261