lcdmddr.tan.qmsg

128×64单色点阵LCD的quartus工程文件

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "7 " "Warning: Found 7 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[18\] " "Info: Detected ripple clock lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[18\] as buffer" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" 261 8 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[18\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[19\] " "Info: Detected ripple clock lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[19\] as buffer" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" 261 8 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[19\]" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "lcdmpddr:inst\|clkm~0 " "Info: Detected gated clock lcdmpddr:inst\|clkm~0 as buffer" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" 24 -1 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "lcdmpddr:inst\|clkm~0" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[20\] " "Info: Detected ripple clock lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[20\] as buffer" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" 261 8 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[20\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[21\] " "Info: Detected ripple clock lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[21\] as buffer" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" 261 8 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[21\]" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "lcdmpddr:inst\|clkm~1 " "Info: Detected gated clock lcdmpddr:inst\|clkm~1 as buffer" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" 24 -1 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "lcdmpddr:inst\|clkm~1" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[15\] " "Info: Detected ripple clock lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[15\] as buffer" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" 261 8 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[15\]" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "sclk register lcdmpddr:inst\|lpm_counter:cntm_rtl_0\|cntr_sv7:auto_generated\|safe_q\[5\] memory pprom6x8:inst2\|altsyncram:altsyncram_component\|altsyncram_gkq:auto_generated\|ram_block1a8~porta_address_reg4 88.54 MHz 11.294 ns Internal " "Info: Clock sclk has Internal fmax of 88.54 MHz between source register lcdmpddr:inst\|lpm_counter:cntm_rtl_0\|cntr_sv7:auto_generated\|safe_q\[5\] and destination memory pprom6x8:inst2\|altsyncram:altsyncram_component\|altsyncram_gkq:auto_generated\|ram_block1a8~porta_address_reg4 (period= 11.294 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.939 ns + Longest register memory " "Info: + Longest register to memory delay is 4.939 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lcdmpddr:inst\|lpm_counter:cntm_rtl_0\|cntr_sv7:auto_generated\|safe_q\[5\] 1 REG LC_X31_Y9_N5 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X31_Y9_N5; Fanout = 6; REG Node = 'lcdmpddr:inst\|lpm_counter:cntm_rtl_0\|cntr_sv7:auto_generated\|safe_q\[5\]'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "" { lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5] } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_sv7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_sv7.tdf" 118 8 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.531 ns) + CELL(0.442 ns) 0.973 ns lcdmpddr:inst\|process2~193 2 COMB LC_X31_Y9_N9 2 " "Info: 2: + IC(0.531 ns) + CELL(0.442 ns) = 0.973 ns; Loc. = LC_X31_Y9_N9; Fanout = 2; COMB Node = 'lcdmpddr:inst\|process2~193'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "0.973 ns" { lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5] lcdmpddr:inst|process2~193 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.291 ns) + CELL(0.292 ns) 2.556 ns lcdmpddr:inst\|process2~196 3 COMB LC_X35_Y9_N8 1 " "Info: 3: + IC(1.291 ns) + CELL(0.292 ns) = 2.556 ns; Loc. = LC_X35_Y9_N8; Fanout = 1; COMB Node = 'lcdmpddr:inst\|process2~196'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "1.583 ns" { lcdmpddr:inst|process2~193 lcdmpddr:inst|process2~196 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.182 ns) + CELL(0.114 ns) 2.852 ns lcdmpddr:inst\|process2~197 4 COMB LC_X35_Y9_N9 7 " "Info: 4: + IC(0.182 ns) + CELL(0.114 ns) = 2.852 ns; Loc. = LC_X35_Y9_N9; Fanout = 7; COMB Node = 'lcdmpddr:inst\|process2~197'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "0.296 ns" { lcdmpddr:inst|process2~196 lcdmpddr:inst|process2~197 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.499 ns) + CELL(0.292 ns) 3.643 ns lcdmpddr:inst\|promadr\[4\]~415 5 COMB LC_X35_Y9_N5 1 " "Info: 5: + IC(0.499 ns) + CELL(0.292 ns) = 3.643 ns; Loc. = LC_X35_Y9_N5; Fanout = 1; COMB Node = 'lcdmpddr:inst\|promadr\[4\]~415'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "0.791 ns" { lcdmpddr:inst|process2~197 lcdmpddr:inst|promadr[4]~415 } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" 12 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.913 ns) + CELL(0.383 ns) 4.939 ns pprom6x8:inst2\|altsyncram:altsyncram_component\|altsyncram_gkq:auto_generated\|ram_block1a8~porta_address_reg4 6 MEM M4K_X33_Y9 9 " "Info: 6: + IC(0.913 ns) + CELL(0.383 ns) = 4.939 ns; Loc. = M4K_X33_Y9; Fanout = 9; MEM Node = 'pprom6x8:inst2\|altsyncram:altsyncram_component\|altsyncram_gkq:auto_generated\|ram_block1a8~porta_address_reg4'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "1.296 ns" { lcdmpddr:inst|promadr[4]~415 pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|ram_block1a8~porta_address_reg4 } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/altsyncram_gkq.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/altsyncram_gkq.tdf" 190 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.523 ns 30.84 % " "Info: Total cell delay = 1.523 ns ( 30.84 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.416 ns 69.16 % " "Info: Total interconnect delay = 3.416 ns ( 69.16 % )" {  } {  } 0}  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "4.939 ns" { lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5] lcdmpddr:inst|process2~193 lcdmpddr:inst|process2~196 lcdmpddr:inst|process2~197 lcdmpddr:inst|promadr[4]~415 pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|ram_block1a8~porta_address_reg4 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-6.038 ns - Smallest " "Info: - Smallest clock skew is -6.038 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sclk destination 3.099 ns + Shortest memory " "Info: + Shortest clock path from clock sclk to destination memory is 3.099 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns sclk 1 CLK PIN_28 30 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 30; CLK Node = 'sclk'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "" { sclk } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmddr.bdf" "" "" { Schematic "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmddr.bdf" { { 48 -8 160 64 "sclk" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.908 ns) + CELL(0.722 ns) 3.099 ns pprom6x8:inst2\|altsyncram:altsyncram_component\|altsyncram_gkq:auto_generated\|ram_block1a8~porta_address_reg4 2 MEM M4K_X33_Y9 9 " "Info: 2: + IC(0.908 ns) + CELL(0.722 ns) = 3.099 ns; Loc. = M4K_X33_Y9; Fanout = 9; MEM Node = 'pprom6x8:inst2\|altsyncram:altsyncram_component\|altsyncram_gkq:auto_generated\|ram_block1a8~porta_address_reg4'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "1.630 ns" { sclk pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|ram_block1a8~porta_address_reg4 } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/altsyncram_gkq.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/altsyncram_gkq.tdf" 190 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 70.70 % " "Info: Total cell delay = 2.191 ns ( 70.70 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.908 ns 29.30 % " "Info: Total interconnect delay = 0.908 ns ( 29.30 % )" {  } {  } 0}  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "3.099 ns" { sclk pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|ram_block1a8~porta_address_reg4 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sclk source 9.137 ns - Longest register " "Info: - Longest clock path from clock sclk to source register is 9.137 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns sclk 1 CLK PIN_28 30 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 30; CLK Node = 'sclk'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "" { sclk } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmddr.bdf" "" "" { Schematic "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmddr.bdf" { { 48 -8 160 64 "sclk" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.006 ns) + CELL(0.935 ns) 3.410 ns lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[18\] 2 REG LC_X8_Y15_N2 4 " "Info: 2: + IC(1.006 ns) + CELL(0.935 ns) = 3.410 ns; Loc. = LC_X8_Y15_N2; Fanout = 4; REG Node = 'lcdmpddr:inst\|lpm_counter:scount_rtl_1\|cntr_lc7:auto_generated\|safe_q\[18\]'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "1.941 ns" { sclk lcdmpddr:inst|lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[18] } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_lc7.tdf" 261 8 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.542 ns) + CELL(0.590 ns) 4.542 ns lcdmpddr:inst\|clkm~0 3 COMB LC_X8_Y15_N6 1 " "Info: 3: + IC(0.542 ns) + CELL(0.590 ns) = 4.542 ns; Loc. = LC_X8_Y15_N6; Fanout = 1; COMB Node = 'lcdmpddr:inst\|clkm~0'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "1.132 ns" { lcdmpddr:inst|lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[18] lcdmpddr:inst|clkm~0 } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" 24 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.182 ns) + CELL(0.114 ns) 4.838 ns lcdmpddr:inst\|clkm~1 4 COMB LC_X8_Y15_N7 10 " "Info: 4: + IC(0.182 ns) + CELL(0.114 ns) = 4.838 ns; Loc. = LC_X8_Y15_N7; Fanout = 10; COMB Node = 'lcdmpddr:inst\|clkm~1'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "0.296 ns" { lcdmpddr:inst|clkm~0 lcdmpddr:inst|clkm~1 } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/lcdmpddr/lcdmpddr.vhd" 24 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.588 ns) + CELL(0.711 ns) 9.137 ns lcdmpddr:inst\|lpm_counter:cntm_rtl_0\|cntr_sv7:auto_generated\|safe_q\[5\] 5 REG LC_X31_Y9_N5 6 " "Info: 5: + IC(3.588 ns) + CELL(0.711 ns) = 9.137 ns; Loc. = LC_X31_Y9_N5; Fanout = 6; REG Node = 'lcdmpddr:inst\|lpm_counter:cntm_rtl_0\|cntr_sv7:auto_generated\|safe_q\[5\]'" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "4.299 ns" { lcdmpddr:inst|clkm~1 lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5] } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_sv7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_sv7.tdf" 118 8 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.819 ns 41.80 % " "Info: Total cell delay = 3.819 ns ( 41.80 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.318 ns 58.20 % " "Info: Total interconnect delay = 5.318 ns ( 58.20 % )" {  } {  } 0}  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "9.137 ns" { sclk lcdmpddr:inst|lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[18] lcdmpddr:inst|clkm~0 lcdmpddr:inst|clkm~1 lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5] } "NODE_NAME" } } }  } 0}  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "3.099 ns" { sclk pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|ram_block1a8~porta_address_reg4 } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "9.137 ns" { sclk lcdmpddr:inst|lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[18] lcdmpddr:inst|clkm~0 lcdmpddr:inst|clkm~1 lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_sv7.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/cntr_sv7.tdf" 118 8 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns + " "Info: + Micro setup delay of destination is 0.093 ns" {  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/altsyncram_gkq.tdf" "" "" { Text "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C6/08 lcdmddr/db/altsyncram_gkq.tdf" 190 2 0 } }  } 0}  } { { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "4.939 ns" { lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5] lcdmpddr:inst|process2~193 lcdmpddr:inst|process2~196 lcdmpddr:inst|process2~197 lcdmpddr:inst|promadr[4]~415 pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|ram_block1a8~porta_address_reg4 } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "3.099 ns" { sclk pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|ram_block1a8~porta_address_reg4 } "NODE_NAME" } } } { "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" "" "" { Report "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr_cmp.qrpt" Compiler "lcdmddr" "UNKNOWN" "V1" "F:/KH-310&& CiC-310/KH-310/实验程序/EP1C12/08 lcdmddr/db/lcdmddr.quartus_db" { Floorplan "" "" "9.137 ns" { sclk lcdmpddr:inst|lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[18] lcdmpddr:inst|clkm~0 lcdmpddr:inst|clkm~1 lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5] } "NODE_NAME" } } }  } 0}