pprom6c8.fit.rpt

128×64单色点阵LCD的quartus工程文件

; 2.5 V               ; 10 pF ; Not Available                      ;
; 1.8 V               ; 10 pF ; Not Available                      ;
; 1.5 V               ; 10 pF ; Not Available                      ;
; SSTL-3 Class I      ; 30 pF ; 50 Ohm (Parallel), 25 Ohm (Serial) ;
; SSTL-3 Class II     ; 30 pF ; 25 Ohm (Parallel), 25 Ohm (Serial) ;
; SSTL-2 Class I      ; 30 pF ; 50 Ohm (Parallel), 25 Ohm (Serial) ;
; SSTL-2 Class II     ; 30 pF ; 25 Ohm (Parallel), 25 Ohm (Serial) ;
; Differential SSTL-2 ; 30 pF ; (See SSTL-2)                       ;
; 3.3-V PCI           ; 10 pF ; 25 Ohm (Parallel)                  ;
; LVDS                ; 4 pF  ; 100 Ohm (Differential)             ;
; RSDS                ; 0 pF  ; 100 Ohm (Differential)             ;
+---------------------+-------+------------------------------------+
Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                                                                                                                                                                                                                     ;
+------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------+
; Compilation Hierarchy Node               ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Full Hierarchy Name                                                                   ;
+------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------+
; |pprom6c8                                ; 0 (0)       ; 0            ; 1024        ; 16   ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; |pprom6c8                                                                             ;
;    |pprom6x8:inst|                       ; 0 (0)       ; 0            ; 1024        ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; |pprom6c8|pprom6x8:inst                                                               ;
;       |altsyncram:altsyncram_component|  ; 0 (0)       ; 0            ; 1024        ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; |pprom6c8|pprom6x8:inst|altsyncram:altsyncram_component                               ;
;          |altsyncram_t0t:auto_generated| ; 0 (0)       ; 0            ; 1024        ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; |pprom6c8|pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated ;
+------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+---------------------------------------------------------------------------------+
; Delay Chain Summary                                                             ;
+--------+----------+---------------+---------------+-----------------------+-----+
; Name   ; Pin Type ; Pad to Core 0 ; Pad to Core 1 ; Pad to Input Register ; TCO ;
+--------+----------+---------------+---------------+-----------------------+-----+
; clkadr ; Input    ; OFF           ; OFF           ; --                    ; --  ;
; adr[0] ; Input    ; ON            ; ON            ; --                    ; --  ;
; adr[1] ; Input    ; ON            ; ON            ; --                    ; --  ;
; adr[2] ; Input    ; ON            ; ON            ; --                    ; --  ;
; adr[3] ; Input    ; ON            ; ON            ; --                    ; --  ;
; adr[4] ; Input    ; ON            ; ON            ; --                    ; --  ;
; adr[5] ; Input    ; ON            ; ON            ; --                    ; --  ;
; adr[6] ; Input    ; ON            ; ON            ; --                    ; --  ;
; q[7]   ; Output   ; --            ; --            ; --                    ; --  ;
; q[6]   ; Output   ; --            ; --            ; --                    ; --  ;
; q[5]   ; Output   ; --            ; --            ; --                    ; --  ;
; q[4]   ; Output   ; --            ; --            ; --                    ; --  ;
; q[3]   ; Output   ; --            ; --            ; --                    ; --  ;
; q[2]   ; Output   ; --            ; --            ; --                    ; --  ;
; q[1]   ; Output   ; --            ; --            ; --                    ; --  ;
; q[0]   ; Output   ; --            ; --            ; --                    ; --  ;
+--------+----------+---------------+---------------+-----------------------+-----+


+-------------------------------------------------------------------------------------------------------------------------------+
; Pad To Core Delay Chain Fanout                                                                                                ;
+-------------------------------------------------------------------------------------------------+-------------------+---------+
; Source Pin / Fanout                                                                             ; Pad To Core Index ; Setting ;
+-------------------------------------------------------------------------------------------------+-------------------+---------+
; clkadr                                                                                          ;                   ;         ;
; adr[0]                                                                                          ;                   ;         ;
;      - pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|ram_block1a7 ; 0                 ; ON      ;
; adr[1]                                                                                          ;                   ;         ;
;      - pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|ram_block1a7 ; 0                 ; ON      ;
; adr[2]                                                                                          ;                   ;         ;
;      - pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|ram_block1a7 ; 0                 ; ON      ;
; adr[3]                                                                                          ;                   ;         ;
;      - pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|ram_block1a7 ; 0                 ; ON      ;
; adr[4]                                                                                          ;                   ;         ;
;      - pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|ram_block1a7 ; 1                 ; ON      ;
; adr[5]                                                                                          ;                   ;         ;
;      - pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|ram_block1a7 ; 1                 ; ON      ;
; adr[6]                                                                                          ;                   ;         ;
;      - pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|ram_block1a7 ; 0                 ; ON      ;
+-------------------------------------------------------------------------------------------------+-------------------+---------+


+----------------------------------------------------------------------------------------+
; Control Signals                                                                        ;
+--------+----------+---------+-------+--------+----------------------+------------------+
; Name   ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ;
+--------+----------+---------+-------+--------+----------------------+------------------+
; clkadr ; PIN_29   ; 1       ; Clock ; yes    ; Global clock         ; GCLK3            ;
+--------+----------+---------+-------+--------+----------------------+------------------+


+-----------------------------------------------------------------------+
; Global & Other Fast Signals                                           ;
+--------+----------+---------+----------------------+------------------+
; Name   ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ;
+--------+----------+---------+----------------------+------------------+
; clkadr ; PIN_29   ; 1       ; Global clock         ; GCLK3            ;
+--------+----------+---------+----------------------+------------------+


+----------------------------------------------------------------------------------------------+
; Non-Global High Fan-Out Signals                                                              ;
+------------------------------------------------------------------------------------+---------+
; Name                                                                               ; Fan-Out ;
+------------------------------------------------------------------------------------+---------+
; adr[6]                                                                             ; 1       ;
; adr[5]                                                                             ; 1       ;
; adr[4]                                                                             ; 1       ;
; adr[3]                                                                             ; 1       ;
; adr[2]                                                                             ; 1       ;
; adr[1]                                                                             ; 1       ;
; adr[0]                                                                             ; 1       ;
; pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|q_a[6] ; 1       ;
; pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|q_a[5] ; 1       ;
; pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|q_a[4] ; 1       ;
; pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|q_a[3] ; 1       ;
; pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|q_a[2] ; 1       ;
; pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|q_a[1] ; 1       ;
; pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|q_a[0] ; 1       ;
; pprom6x8:inst|altsyncram:altsyncram_component|altsyncram_t0t:auto_generated|q_a[7] ; 1       ;
+------------------------------------------------------------------------------------+---------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter RAM Summary                                                                                                                                                                                                                                                                                                                                                ;
+----------------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+------+--