lcdmpddr.tan.summary

128×64单色点阵LCD的quartus工程文件

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 6.025 ns
From           : clear
To             : lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[1]
From Clock     : 
To Clock       : sclk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 18.232 ns
From           : lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[4]
To             : promadr[1]
From Clock     : sclk
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 2.003 ns
From           : sel[1]
To             : d[0]
From Clock     : 
To Clock       : sclk
Failed Paths   : 0

Type           : Worst-case Minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 11.491 ns
From           : db[1]~reg0
To             : db[1]
From Clock     : sclk
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'sclk'
Slack          : N/A
Required Time  : None
Actual Time    : 206.23 MHz ( period = 4.849 ns )
From           : lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[4]
To             : en~reg0
From Clock     : sclk
To Clock       : sclk
Failed Paths   : 0

Type           : Clock Setup: 'sel[0]'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[1]
To             : lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[7]
From Clock     : sel[0]
To Clock       : sel[0]
Failed Paths   : 0

Type           : Clock Setup: 'sel[1]'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[1]
To             : lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[7]
From Clock     : sel[1]
To Clock       : sel[1]
Failed Paths   : 0

Type           : Clock Setup: 'sclkm'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[1]
To             : lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[7]
From Clock     : sclkm
To Clock       : sclkm
Failed Paths   : 0

Type           : Clock Hold: 'sclk'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[21]
To             : d[0]
From Clock     : sclk
To Clock       : sclk
Failed Paths   : 3

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 3

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