lcdmpddr.map.eqn

128×64单色点阵LCD的quartus工程文件

cntd[1] = DFFEA(cntd[1]_lut_out, D1_safe_q[15], VCC, , , , );


--cntd[0] is cntd[0]
--operation mode is normal

cntd[0]_lut_out = !clear & !cntd[0];
cntd[0] = DFFEA(cntd[0]_lut_out, D1_safe_q[15], VCC, , , , );


--cntd[3] is cntd[3]
--operation mode is normal

cntd[3]_lut_out = cntd[2] & !clear;
cntd[3] = DFFEA(cntd[3]_lut_out, D1_safe_q[15], VCC, , , , );


--D1_safe_q[19] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[19]
--operation mode is arithmetic

D1_safe_q[19]_carry_eqn = D1L83;
D1_safe_q[19]_lut_out = D1_safe_q[19] $ D1_safe_q[19]_carry_eqn;
D1_safe_q[19]_reg_input = !clear & D1_safe_q[19]_lut_out;
D1_safe_q[19] = DFFEA(D1_safe_q[19]_reg_input, sclk, VCC, , , , );

--D1L04 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella19~COUT
--operation mode is arithmetic

D1L04 = CARRY(!D1L83 # !D1_safe_q[19]);


--D1_safe_q[17] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[17]
--operation mode is arithmetic

D1_safe_q[17]_carry_eqn = D1L43;
D1_safe_q[17]_lut_out = D1_safe_q[17] $ D1_safe_q[17]_carry_eqn;
D1_safe_q[17]_reg_input = !clear & D1_safe_q[17]_lut_out;
D1_safe_q[17] = DFFEA(D1_safe_q[17]_reg_input, sclk, VCC, , , , );

--D1L63 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella17~COUT
--operation mode is arithmetic

D1L63 = CARRY(!D1L43 # !D1_safe_q[17]);


--A1L021 is stks~257
--operation mode is normal

A1L021 = A1L811 & !stks[0] & (stks[2] $ stks[3]);


--D1_safe_q[13] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[13]
--operation mode is arithmetic

D1_safe_q[13]_carry_eqn = D1L62;
D1_safe_q[13]_lut_out = D1_safe_q[13] $ D1_safe_q[13]_carry_eqn;
D1_safe_q[13]_reg_input = !clear & D1_safe_q[13]_lut_out;
D1_safe_q[13] = DFFEA(D1_safe_q[13]_reg_input, sclk, VCC, , , , );

--D1L82 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella13~COUT
--operation mode is arithmetic

D1L82 = CARRY(!D1L62 # !D1_safe_q[13]);


--dbnc is dbnc
--operation mode is normal

dbnc_lut_out = dbnc & (d[1] # d[0]) # !dbnc & d[1] & d[0];
dbnc = DFFEA(dbnc_lut_out, D1_safe_q[15], VCC, , !clear, , );


--ssk[1] is ssk[1]
--operation mode is normal

ssk[1]_lut_out = !clear & (ssk[1] & !ssk[0] & dbnc # !ssk[1] & ssk[0]);
ssk[1] = DFFEA(ssk[1]_lut_out, D1_safe_q[15], VCC, , , , );


--D1_safe_q[16] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[16]
--operation mode is arithmetic

D1_safe_q[16]_carry_eqn = D1L23;
D1_safe_q[16]_lut_out = D1_safe_q[16] $ !D1_safe_q[16]_carry_eqn;
D1_safe_q[16]_reg_input = !clear & D1_safe_q[16]_lut_out;
D1_safe_q[16] = DFFEA(D1_safe_q[16]_reg_input, sclk, VCC, , , , );

--D1L43 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella16~COUT
--operation mode is arithmetic

D1L43 = CARRY(D1_safe_q[16] & !D1L23);


--D1_safe_q[12] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[12]
--operation mode is arithmetic

D1_safe_q[12]_carry_eqn = D1L42;
D1_safe_q[12]_lut_out = D1_safe_q[12] $ !D1_safe_q[12]_carry_eqn;
D1_safe_q[12]_reg_input = !clear & D1_safe_q[12]_lut_out;
D1_safe_q[12] = DFFEA(D1_safe_q[12]_reg_input, sclk, VCC, , , , );

--D1L62 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella12~COUT
--operation mode is arithmetic

D1L62 = CARRY(D1_safe_q[12] & !D1L42);


--d[1] is d[1]
--operation mode is normal

d[1]_lut_out = d[0] & !clear;
d[1] = DFFEA(d[1]_lut_out, D1_safe_q[15], VCC, , , , );


--d[0] is d[0]
--operation mode is normal

d[0]_lut_out = !clear & (A1L5 # start);
d[0] = DFFEA(d[0]_lut_out, D1_safe_q[15], VCC, , , , );


--D1_safe_q[11] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[11]
--operation mode is arithmetic

D1_safe_q[11]_carry_eqn = D1L22;
D1_safe_q[11]_lut_out = D1_safe_q[11] $ D1_safe_q[11]_carry_eqn;
D1_safe_q[11]_reg_input = !clear & D1_safe_q[11]_lut_out;
D1_safe_q[11] = DFFEA(D1_safe_q[11]_reg_input, sclk, VCC, , , , );

--D1L42 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella11~COUT
--operation mode is arithmetic

D1L42 = CARRY(!D1L22 # !D1_safe_q[11]);


--D1_safe_q[10] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[10]
--operation mode is arithmetic

D1_safe_q[10]_carry_eqn = D1L02;
D1_safe_q[10]_lut_out = D1_safe_q[10] $ !D1_safe_q[10]_carry_eqn;
D1_safe_q[10]_reg_input = !clear & D1_safe_q[10]_lut_out;
D1_safe_q[10] = DFFEA(D1_safe_q[10]_reg_input, sclk, VCC, , , , );

--D1L22 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella10~COUT
--operation mode is arithmetic

D1L22 = CARRY(D1_safe_q[10] & !D1L02);


--D1_safe_q[9] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[9]
--operation mode is arithmetic

D1_safe_q[9]_carry_eqn = D1L81;
D1_safe_q[9]_lut_out = D1_safe_q[9] $ D1_safe_q[9]_carry_eqn;
D1_safe_q[9]_reg_input = !clear & D1_safe_q[9]_lut_out;
D1_safe_q[9] = DFFEA(D1_safe_q[9]_reg_input, sclk, VCC, , , , );

--D1L02 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella9~COUT
--operation mode is arithmetic

D1L02 = CARRY(!D1L81 # !D1_safe_q[9]);


--D1_safe_q[8] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[8]
--operation mode is arithmetic

D1_safe_q[8]_carry_eqn = D1L61;
D1_safe_q[8]_lut_out = D1_safe_q[8] $ !D1_safe_q[8]_carry_eqn;
D1_safe_q[8]_reg_input = !clear & D1_safe_q[8]_lut_out;
D1_safe_q[8] = DFFEA(D1_safe_q[8]_reg_input, sclk, VCC, , , , );

--D1L81 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella8~COUT
--operation mode is arithmetic

D1L81 = CARRY(D1_safe_q[8] & !D1L61);


--D1_safe_q[7] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[7]
--operation mode is arithmetic

D1_safe_q[7]_carry_eqn = D1L41;
D1_safe_q[7]_lut_out = D1_safe_q[7] $ D1_safe_q[7]_carry_eqn;
D1_safe_q[7]_reg_input = !clear & D1_safe_q[7]_lut_out;
D1_safe_q[7] = DFFEA(D1_safe_q[7]_reg_input, sclk, VCC, , , , );

--D1L61 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella7~COUT
--operation mode is arithmetic

D1L61 = CARRY(!D1L41 # !D1_safe_q[7]);


--D1_safe_q[6] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[6]
--operation mode is arithmetic

D1_safe_q[6]_carry_eqn = D1L21;
D1_safe_q[6]_lut_out = D1_safe_q[6] $ !D1_safe_q[6]_carry_eqn;
D1_safe_q[6]_reg_input = !clear & D1_safe_q[6]_lut_out;
D1_safe_q[6] = DFFEA(D1_safe_q[6]_reg_input, sclk, VCC, , , , );

--D1L41 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella6~COUT
--operation mode is arithmetic

D1L41 = CARRY(D1_safe_q[6] & !D1L21);


--D1_safe_q[5] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[5]
--operation mode is arithmetic

D1_safe_q[5]_carry_eqn = D1L01;
D1_safe_q[5]_lut_out = D1_safe_q[5] $ D1_safe_q[5]_carry_eqn;
D1_safe_q[5]_reg_input = !clear & D1_safe_q[5]_lut_out;
D1_safe_q[5] = DFFEA(D1_safe_q[5]_reg_input, sclk, VCC, , , , );

--D1L21 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella5~COUT
--operation mode is arithmetic

D1L21 = CARRY(!D1L01 # !D1_safe_q[5]);


--D1_safe_q[4] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[4]
--operation mode is arithmetic

D1_safe_q[4]_carry_eqn = D1L8;
D1_safe_q[4]_lut_out = D1_safe_q[4] $ !D1_safe_q[4]_carry_eqn;
D1_safe_q[4]_reg_input = !clear & D1_safe_q[4]_lut_out;
D1_safe_q[4] = DFFEA(D1_safe_q[4]_reg_input, sclk, VCC, , , , );

--D1L01 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella4~COUT
--operation mode is arithmetic

D1L01 = CARRY(D1_safe_q[4] & !D1L8);


--D1_safe_q[3] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[3]
--operation mode is arithmetic

D1_safe_q[3]_carry_eqn = D1L6;
D1_safe_q[3]_lut_out = D1_safe_q[3] $ D1_safe_q[3]_carry_eqn;
D1_safe_q[3]_reg_input = !clear & D1_safe_q[3]_lut_out;
D1_safe_q[3] = DFFEA(D1_safe_q[3]_reg_input, sclk, VCC, , , , );

--D1L8 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella3~COUT
--operation mode is arithmetic

D1L8 = CARRY(!D1L6 # !D1_safe_q[3]);


--D1_safe_q[2] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[2]
--operation mode is arithmetic

D1_safe_q[2]_carry_eqn = D1L4;
D1_safe_q[2]_lut_out = D1_safe_q[2] $ !D1_safe_q[2]_carry_eqn;
D1_safe_q[2]_reg_input = !clear & D1_safe_q[2]_lut_out;
D1_safe_q[2] = DFFEA(D1_safe_q[2]_reg_input, sclk, VCC, , , , );

--D1L6 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

D1L6 = CARRY(D1_safe_q[2] & !D1L4);


--D1_safe_q[1] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[1]
--operation mode is arithmetic

D1_safe_q[1]_carry_eqn = D1L2;
D1_safe_q[1]_lut_out = D1_safe_q[1] $ D1_safe_q[1]_carry_eqn;
D1_safe_q[1]_reg_input = !clear & D1_safe_q[1]_lut_out;
D1_safe_q[1] = DFFEA(D1_safe_q[1]_reg_input, sclk, VCC, , , , );

--D1L4 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

D1L4 = CARRY(!D1L2 # !D1_safe_q[1]);


--D1_safe_q[0] is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|safe_q[0]
--operation mode is arithmetic

D1_safe_q[0]_lut_out = !D1_safe_q[0];
D1_safe_q[0]_reg_input = !clear & D1_safe_q[0]_lut_out;
D1_safe_q[0] = DFFEA(D1_safe_q[0]_reg_input, sclk, VCC, , , , );

--D1L2 is lpm_counter:scount_rtl_1|cntr_lc7:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

D1L2 = CARRY(D1_safe_q[0]);


--clear is clear
--operation mode is input

clear = INPUT();


--datai[8] is datai[8]
--operation mode is input

datai[8] = INPUT();


--prom_data[8] is prom_data[8]
--operation mode is input

prom_data[8] = INPUT();


--mode is mode
--operation mode is input

mode = INPUT();


--sel[1] is sel[1]
--operation mode is input

sel[1] = INPUT();


--sel[0] is sel[0]
--operation mode is input

sel[0] = INPUT();


--sclkm is sclkm
--operation mode is input

sclkm = INPUT();


--datai[7] is datai[7]
--operation mode is input

datai[7] = INPUT();


--prom_data[7] is prom_data[7]
--operation mode is input

prom_data[7] = INPUT();


--datai[6] is datai[6]
--operation mode is input

datai[6] = INPUT();


--prom_data[6] is prom_data[6]
--operation mode is input

prom_data[6] = INPUT();


--datai[5] is datai[5]
--operation mode is input

datai[5] = INPUT();


--prom_data[5] is prom_data[5]
--operation mode is input

prom_data[5] = INPUT();


--datai[4] is datai[4]
--operation mode is input

datai[4] = INPUT();


--prom_data[4] is prom_data[4]
--operation mode is input

prom_data[4] = INPUT();


--datai[3] is datai[3]
--operation mode is input

datai[3] = INPUT();


--prom_data[3] is prom_data[3]
--operation mode is input

prom_data[3] = INPUT();


--datai[2] is datai[2]
--operation mode is input

datai[2] = INPUT();


--prom_data[2] is prom_data[2]
--operation mode is input

prom_data[2] = INPUT();


--datai[1] is datai[1]
--operation mode is input

datai[1] = INPUT();


--prom_data[1] is prom_data[1]
--operation mode is input

prom_data[1] = INPUT();


--datai[0] is datai[0]
--operation mode is input

datai[0] = INPUT();


--prom_data[0] is prom_data[0]
--operation mode is input

prom_data[0] = INPUT();


--sclk is sclk
--operation mode is input

sclk = INPUT();


--start is start
--operation mode is input

start = INPUT();


--en is en
--operation mode is output

en = OUTPUT(A1L25Q);


--r_w is r_w
--operation mode is output

r_w = OUTPUT(A1L301Q);


--d_i is d_i
--operation mode is output

d_i = OUTPUT(A1L22Q);


--tmdt is tmdt
--operation mode is output

tmdt = OUTPUT(A1L221Q);


--promadr[7] is promadr[7]
--operation mode is output

promadr[7] = OUTPUT(A1L59);


--promadr[6] is promadr[6]
--operation mode is output

promadr[6] = OUTPUT(A1L69);


--promadr[5] is promadr[5]
--operation mode is output

promadr[5] = OUTPUT(A1L79);


--promadr[4] is promadr[4]
--operation mode is output

promadr[4] = OUTPUT(A1L89);


--promadr[3] is promadr[3]
--operation mode is output

promadr[3] = OUTPUT(A1L99);


--promadr[2] is promadr[2]
--operation mode is output

promadr[2] = OUTPUT(A1L39);


--promadr[1] is promadr[1]
--operation mode is output

promadr[1] = OUTPUT(A1L001);


--promadr[0] is promadr[0]
--operation mode is output

promadr[0] = OUTPUT(A1L49);


--db[7] is db[7]
--operation mode is output

db[7] = OUTPUT(A1L94Q);


--db[6] is db[6]
--operation mode is output

db[6] = OUTPUT(A1L74Q);


--db[5] is db[5]
--operation mode is output

db[5] = OUTPUT(A1L54Q);


--db[4] is db[4]
--operation mode is output

db[4] = OUTPUT(A1L34Q);


--db[3] is db[3]
--operation mode is output

db[3] = OUTPUT(A1L14Q);


--db[2] is db[2]
--operation mode is output

db[2] = OUTPUT(A1L93Q);


--db[1] is db[1]
--operation mode is output

db[1] = OUTPUT(A1L73Q);


--db[0] is db[0]
--operation mode is output

db[0] = OUTPUT(A1L53Q);


--A1L51 is cntp[1]~50
--operation mode is normal

A1L51 = !cntp[1];