lcdmddr.tan.summary

128×64单色点阵LCD的quartus工程文件

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 6.113 ns
From           : clear
To             : lcdmpddr:inst|stks[3]
From Clock     : 
To Clock       : sclk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.687 ns
From           : lcdmpddr:inst|en
To             : lcden
From Clock     : sclk
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'sclk'
Slack          : N/A
Required Time  : None
Actual Time    : 88.54 MHz ( period = 11.294 ns )
From           : lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5]
To             : pprom6x8:inst2|altsyncram:altsyncram_component|altsyncram_gkq:auto_generated|ram_block1a8~porta_address_reg4
From Clock     : sclk
To Clock       : sclk
Failed Paths   : 0

Type           : Clock Setup: 'sel[0]'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[1]
To             : lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5]
From Clock     : sel[0]
To Clock       : sel[0]
Failed Paths   : 0

Type           : Clock Setup: 'sel[1]'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[1]
To             : lcdmpddr:inst|lpm_counter:cntm_rtl_0|cntr_sv7:auto_generated|safe_q[5]
From Clock     : sel[1]
To Clock       : sel[1]
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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