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📄 skyeye_mach_at91.c

📁 skyeye-1.2-RC7-3的源代码
💻 C
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/*	skyeye_mach_at91.c - define machine at91 for skyeye	Copyright (C) 2003 Skyeye Develop Group	for help please send mail to <skyeye-developer@lists.gro.clinux.org>		This program is free software; you can redistribute it and/or modify	it under the terms of the GNU General Public License as published by	the Free Software Foundation; either version 2 of the License, or	(at your option) any later version.	This program is distributed in the hope that it will be useful,	but WITHOUT ANY WARRANTY; without even the implied warranty of	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the	GNU General Public License for more details.	You should have received a copy of the GNU General Public License	along with this program; if not, write to the Free Software	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA  *//* * 06/15/2005 	rewrite interrupt simulation *			walimis <wlm@student.dlut.edu.cn> * * 3/24/2003 	init this file. * 		add machine at91's function.Most taken from original armio.c  * 		include: at91_mach_init, at91_io_do_cycle * 		at91_io_read_word, at91_io_write_word *			walimis <wlm@student.dlut.edu.cn> *		 *3/24/2003	chenyu <chenyu-tmlinux@hpclab.cs.tsinghua.edu.cn> has done the *		necessary work to armio.c * *///koodailar add for mingw 2005.12.18 ----------------------------------------#ifdef __MINGW32__#include "arch/arm/common/armdefs.h"#include "utils/stub/mingw_help.h"#else#include "armdefs.h"#endif// end ----------------------------------------------------------------------#include "at91.h"#define DEBUG 0#if DEBUG#define DBG_PRINT(a...) fprintf(stderr, ##a)#else#define DBG_PRINT(a...)#endif//chy 2005-07-28//zzc:2005-1-1#ifdef __CYGWIN__#include <time.h>//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------/*struct timeval{	long tv_sec;	long tv_usec;};*///AJ2D--------------------------------------------------------------------------#endifextern unsigned long Pen_buffer[8];typedef struct at91_io{	ARMword syscon;		/* System control */	ARMword sysflg;		/* System status flags */	/* rewrite interrupt code.	 * */	u32 ivr;	u32 fvr;	u32 isr;	u32 ipr;	u32 imr;	u32 cisr;	u32 iecr;	u32 idcr;	u32 iccr;	u32 iscr;	u32 eoicr;	u32 spu;	ARMword tcd[2];		/* Timer/counter data */	ARMword tcd_reload[2];	/* Last value written */	ARMword uartdr;		/* Receive data register */	ARMword lcdcon;		/* LCD control */	ARMword lcd_limit;	/* 0xc0000000 <= LCD buffer < lcd_limi				   t */	ARMword ts_buffer[8];	ARMword ts_addr_begin;	ARMword ts_addr_end;} at91_io_t;static at91_io_t at91_io;#define io at91_iostatic voidat91_update_int (ARMul_State * state){	ARMword requests = io.ipr & io.imr;	state->NfiqSig = (requests & 0x00001) ? LOW : HIGH;	state->NirqSig = (requests & 0x3fffe) ? LOW : HIGH;}/* new added functions * */static voidat91_set_intr (u32 interrupt){	io.ipr |= (1 << interrupt);}static intat91_pending_intr (u32 interrupt){	return ((io.ipr & (1 << interrupt)));}static voidat91_update_intr (void *mach){	struct machine_config *mc = (struct machine_config *) mach;	ARMul_State *state = (ARMul_State *) mc->state;	ARMword requests = io.ipr & io.imr;	state->NfiqSig = (requests & 0x00001) ? LOW : HIGH;	state->NirqSig = (requests & 0x3fffe) ? LOW : HIGH;}static intat91_mem_read_byte (void *mach, u32 addr, u32 * data){	struct machine_config *mc = (struct machine_config *) mach;	ARMul_State *state = (ARMul_State *) mc->state;	*data = (u32) mem_read_char (state, addr);}static intat91_mem_write_byte (void *mach, u32 addr, u32 data){	struct machine_config *mc = (struct machine_config *) mach;	ARMul_State *state = (ARMul_State *) mc->state;	mem_write_char (state, addr, (char) data);}static voidat91_io_reset (ARMul_State * state){	io.syscon = 0;	io.sysflg = URXFE;	io.tcd[0] = 0xffff;	io.tcd[1] = 0xffff;	io.tcd_reload[0] = 0xffff;	io.tcd_reload[1] = 0xffff;	io.uartdr = 0;	io.lcdcon = 0;	io.lcd_limit = 0;	io.ts_addr_begin = 0xff00b000;	io.ts_addr_end = 0xff00b01f;}static ARMword rpr;int rcr;//koodailar add for mingw 2005.12.18 ----------------------------------------#ifdef __MINGW32__voidat91_io_do_cycle (ARMul_State * state){	int t;		mingw_start_thread(skyeye_config.uart.fd_in);	for (t = 0; t < 2; t++) {		if (io.tcd[t] == 0) {			if (io.syscon & (t ? TC2M : TC1M)) {				io.tcd[t] = io.tcd_reload[t];			}			else {				io.tcd[t] = 0xffff;			}			at91_set_intr (t ? IRQ_TC2 : IRQ_TC1);			at91_update_int (state);		}		else {			io.tcd[t]--;		}	}	if (rcr > 0 && !(io.ipr & IRQ_USART0)) {			if (SDL_SemTryWait(get_mingw_read_sem())==0) 			{	  			if(get_mingw_sem_first_time() != 1 && get_mingw_readed() == 1)					{ 							unsigned char buf[16];							int n, i;							n = 1;							buf[0] = get_mingw_char_read();							set_mingw_readed(0);							for (i = 0; i < n; i++, rcr--, rpr++)								mem_write_char (state, rpr, buf[i]);							if (rcr == 0)								io.sysflg &= ~URXFE;							if (n) {								at91_set_intr (IRQ_USART0);								at91_update_int (state);							}					}					SDL_SemPost(get_mingw_read_sem());     			printf(" \b");					fflush(stdout);			}	}			/* if (rcr > 0 && ... */#ifndef NO_LCD	if (!(io.ipr & IRQ_EXT1)) {	//if now has no ts interrupt,then query 		if (Pen_buffer[6] == 1) {	//should trigger a interrupt			*(io.ts_buffer + 0) = Pen_buffer[0];			*(io.ts_buffer + 1) = Pen_buffer[1];			*(io.ts_buffer + 4) = Pen_buffer[4];			*(io.ts_buffer + 6) = Pen_buffer[6];			at91_set_intr (IRQ_EXT1);			Pen_buffer[6] = 0;		}	}#endif	at91_update_int (state);}#else/*at91 io_do_cycle*/voidat91_io_do_cycle (ARMul_State * state){	int t;	for (t = 0; t < 2; t++) {		if (io.tcd[t] == 0) {			if (io.syscon & (t ? TC2M : TC1M)) {				io.tcd[t] = io.tcd_reload[t];			}			else {				io.tcd[t] = 0xffff;			}			at91_set_intr (t ? IRQ_TC2 : IRQ_TC1);			at91_update_int (state);		}		else {			io.tcd[t]--;		}	}	if (rcr > 0 && !(io.ipr & IRQ_USART0)) {		fd_set rfds;		struct timeval tv;		FD_ZERO (&rfds);		FD_SET (skyeye_config.uart.fd_in, &rfds);		tv.tv_sec = 0;		tv.tv_usec = 0;		if (select		    (skyeye_config.uart.fd_in + 1, &rfds, NULL, NULL,		     &tv) == 1) {			unsigned char buf[16];			int n, i;			n = read (skyeye_config.uart.fd_in, buf,				  rcr > sizeof (buf) ? sizeof (buf) : rcr);			for (i = 0; i < n; i++, rcr--, rpr++)				mem_write_char (state, rpr, buf[i]);			if (rcr == 0)				io.sysflg &= ~URXFE;			if (n) {				at91_set_intr (IRQ_USART0);				at91_update_int (state);			}		}	}			/* if (rcr > 0 && ... */#ifndef NO_LCD	if (!(io.ipr & IRQ_EXT1)) {	//if now has no ts interrupt,then query 		if (Pen_buffer[6] == 1) {	//should trigger a interrupt			*(io.ts_buffer + 0) = Pen_buffer[0];			*(io.ts_buffer + 1) = Pen_buffer[1];			*(io.ts_buffer + 4) = Pen_buffer[4];			*(io.ts_buffer + 6) = Pen_buffer[6];			at91_set_intr (IRQ_EXT1);			Pen_buffer[6] = 0;		}	}#endif	at91_update_int (state);}#endif// end ----------------------------------------------------------------------		/* *  * Atmel serial support for uClinux console. *   */static char *uart_reg[] = {	"CR",	"MR",	"IER",	"IDR",	"IMR",	"CSR",	"RHR",	"THR",	"BRGR",	"RTOR",	"TTGR",	"RES1",	"RPR",	"RCR",	"TPR",	"TCR",};static ARMworduart_read (ARMul_State * state, ARMword addr){	ARMword data;	switch ((addr & 0xfff) >> 2) {	case 0xd:		// RCR		data = rcr;		break;	case 0xf:		// TCR		data = 0;		break;	case 0x5:		// CSR		data = (1 << 9) | (1 << 1) |	/* always empty and ready */			(rcr ? ((1 << 3) | (1 << 0)) : 0);		break;	case 0x0:		// CR	case 0x1:		// MR	case 0x2:		// IER	case 0x3:		// IDR	case 0x4:		// IMR	case 0x6:		// RHR	case 0x7:		// THR	case 0x8:		// BRGR

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