📄 plc.lst
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C51 COMPILER V7.09 PLC 01/12/2007 09:29:48 PAGE 1
C51 COMPILER V7.09, COMPILATION OF MODULE PLC
OBJECT MODULE PLACED IN plc.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE plc.c ROM(COMPACT) OPTIMIZE(9,SPEED) BROWSE MODP2 DEBUG OBJECTEXTEND PREPRI
-NT
line level source
1 /* //////////////////////////////////////////////////////////////////////////
2 // lme2200.c - source file for lme2200 API
3 //
4 // Copyright 2005, Leaguer MicroElectronics Co., Ltd
5 // www.leaguerme.com
6 //////////////////////////////////////////////////////////////////////////// */
7 #include <REG922.H>
8
9 #include "sart.h"
10 #include "plc.h"
11 #include "timer.h"
12 #include "wr_flash.h"
13 //#include "Beacon.h"
14
15 #define uint unsigned int
16 #define uchar unsigned char
17
18 // Maximum time to wait to get reply from the chip after sending read command in sync mode,
19 // in number of instructions
20 #define SYNC_WAIT 100
21
22 #define INC_THRES_EA 16
23 #define MAX_THRES_EA 0x80
24 #define MIN_THRES_EA 16
25 #define DEC_THRES_EA 8
26 idata uchar cur_smod = SMOD_SYNC; // default
27 idata uchar frame_sz = 18;
28
29 // !!!!!!!! EA, EB should be initially set to prevent receiving packets
30 //uchar code plc_setting[] = {0x30,0x00,0x32,0x05,0x33,0x01,0x34,0x02,0x35,0x12,0x36,0x08,0x37,0xBC,0x38,0
-x60,0x39,0x64,0x3a,0x68,0x3b,0x6c,0x3c,0x04,0x3e,0x00,0x3f,0x00};//28 byte 传输速率为2400
31 uchar code plc_setting[] = {0x30,0x00,0x32,0x10,0x33,0x01,0x34,0x02,0x35,0x12,0x36,0x08,0x37,0x3C,0x38,0x6
-0,0x39,0x64,0x3a,0x68,0x3b,0x6c,0x3c,0x04,0x3e,0x00,0x3f,0x00};//28 byte 传输速率为1200
32 /*
33 uchar code WtFIR[] = {0x77,0x0d,0xfb,0xe8,0xfe,0xeb,0x06,0xac,0x06,0x8c,0xfb,0xba,
34 0xf4,0xae,0xfd,0x64,0x0a,0x68,0x08,0xf3,0xfb,0x38,0xf8,0xf8,
35 0xfe,0x8e,0x00,0xa7,0xfc,0x04,0x04,0x76,0x11,0x2c,0x06,0x39,
36 0xe3,0x7f,0xde,0x1a,0x13,0xfc,0x3e,0x7d,0x13,0x19,0xbb,0x4a,
37 0xb7,0x00,0x22,0xae,0x6c,0x7f,0x21,0x3f,0x9d,0xcc,0x9b,0xe5,
38 0x27,0xff,0x7f};
39 */
40 idata uchar thres_ea;
41 idata uchar wet;
42
43 bit packet_recved;
44 bit packet_recving;
45 bit timeout_40s;
46 bit timeout_1s;
47 bit timeout_1m;
48 extern bit reply;
49 //bit init_set;
50 bit rx_adj;
51 bit rx_stop;
52 bit delay_tx;
C51 COMPILER V7.09 PLC 01/12/2007 09:29:48 PAGE 2
53 idata uchar thres_set;
54 void timeout_t2(void);
55
56 /////////////////////////////////////////////////////////////////
57 // Data sending & receiving functions
58 /*=============================================================================*/
59 // Send a single byte
60 void send_data(uchar c)
61 {
62 1 sync_sendchar(c);
63 1 }
64
65 /*=============================================================================*/
66
67 // Send a data block of specified length
68 void send_block(uchar block[], uint len)
69 {
70 1 uchar i;
71 1
72 1 for (i = 0; i < len; i++) send_data(block[i]);
73 1
74 1 }
75 /*=============================================================================*/
76 // Register write & read operations
77
78 // Write register
79 void write_reg(uchar op, uchar val)
80 {
81 1 uchar buf[2];
82 1
83 1 buf[0] = op;
84 1 buf[1] = val;
85 1 send_block(buf, 2);
86 1
87 1 }
88 /*=============================================================================*/
89
90 // Read register. Return -1 if error,
91 // otherwise, the result is in the lower byte of the returned value
92 int read_reg(uchar op)
93 {
94 1 uchar i;
95 1
96 1 // ET0 = 0;
97 1
98 1 send_data(op); // send the read command
99 1
100 1 /* if (cur_smod == SMOD_ASYNC) {
101 1
102 1 // ET0 = 1;
103 1
104 1 return -1; // not supported
105 1 }*/
106 1
107 1 // sync mode
108 1 i = 0;
109 1 while (i++ < SYNC_WAIT) {
110 2 if (sync_data_ready()) break;
111 2 }
112 1
113 1 if (!sync_data_ready()) {
114 2
C51 COMPILER V7.09 PLC 01/12/2007 09:29:48 PAGE 3
115 2 // ET0 = 1;
116 2
117 2 return -1; // time out
118 2 }
119 1
120 1 i = sync_getchar();
121 1
122 1 // ET0 = 1;
123 1
124 1 return i;
125 1
126 1 }
127 /*=============================================================================*/
128
129 // Read from buffer (multiple bytes)
130 int read_buffer(uchar op, uchar buf[], uint len)
131 {
132 1 uint i;
133 1
134 1 // ET0 = 0;
135 1
136 1 //rx_clear();
137 1 send_data(op); // send the read command
138 1
139 1 if (cur_smod == SMOD_ASYNC) {
140 2 // async mode
141 2
142 2 // ET0 = 1;
143 2 return -1;
144 2 }
145 1
146 1 // sync mode
147 1 i = 0;
148 1 while (i++ < SYNC_WAIT) {
149 2 if (sync_data_ready()) break;
150 2 }
151 1
152 1 if (!sync_data_ready()) {
153 2
154 2 // ET0 = 1;
155 2 return -1; // time out
156 2 }
157 1
158 1 i = sync_getblock(buf, len);
159 1 // ET0 = 1;
160 1
161 1 return i;
162 1
163 1 }
164 /*=============================================================================*/
165 /*=============================================================================* /
166
167
168 // Send a command
169 void send_command(uchar cmd)
170 {
171 send_data(cmd);
172 }
173
174 /*=============================================================================*/
175 // Register operations
176
C51 COMPILER V7.09 PLC 01/12/2007 09:29:48 PAGE 4
177 /*
178 int set_sync_err(char val)
179 {
180 ET0 = 0;
181 write_reg(REG_WR_SYNC_ERR, val);
182 ET0 = 1;
183
184 // Verify
185 if (read_reg(REG_RD_SYNC_ERR) != (int)val)
186 return -1;
187
188 return 0;
189
190 }
191
192 */
193 /*=============================================================================*/
194
195 int set_thres_ea(uchar val)
196 {
197 1 // ET0 = 0;
198 1 write_reg(REG_WR_EA, val);
199 1 // ET0 = 1;
200 1
201 1 // Verify
202 1 if (read_reg(REG_RD_EA) != (uint)val)
203 1 return -1;
204 1 }
205
206 /*=============================================================================*/
207
208
209 int set_thres_eb(uchar val)
210 {
211 1 // ET0 = 0;
212 1 write_reg(REG_WR_EB, val);
213 1 // ET0 = 1;
214 1
215 1 // Verify
216 1 if (read_reg(REG_RD_EB) != (uint)val)
217 1 return -1;
218 1 }
219
220 /*=============================================================================*/
221
222 int read_crc()
223 {
224 1 return (read_reg(REG_RD_STATUS) & 0x01);
225 1 }
226 /*=============================================================================*/
227
228 /*
229 int read_rssi(char rssi[])
230 {
231 int val;
232
233 val = read_reg(REG_RD_EA);
234 if (val < 0) return -1;
235 rssi[0] = (char)val;
236
237 val = read_reg(REG_RD_EB);
238 if (val < 0) return -1;
C51 COMPILER V7.09 PLC 01/12/2007 09:29:48 PAGE 5
239 rssi[1] = (char)val;
240
241 return 0;
242 }
243 */
244 /*=============================================================================*/
245
246 int write_txbuffer(uchar buffer[])
247 {
248 1 send_data(BUF_WR_TXBUF);
249 1 send_block(buffer, frame_sz);
250 1
251 1 return 0;
252 1 }
253
254 /*=============================================================================*/
255
256 /*
257 int read_txbuffer(char buffer[])
258 {
259 return read_buffer(BUF_RD_TXBUF, buffer, frame_sz);
260 }
261 *//*
262 int read_rxbuffer(uchar buffer[])
263 {
264 return read_buffer(BUF_RD_RXBUF, buffer, frame_sz);
265 }
266 /**/
267
268 /*=============================================================================* /
269
270 void send()
271 {
272 // ET0 = 0;
273 send_command(CMD_TRANSMIT);
274 // ET0 = 1;
275 }
276
277 /*
278 int plc_reset()
279 {
280 send_command(CMD_RESET);
281
282 return 1;
283
284 }
285 */
286 /*=============================================================================*/
287
288 //////////////////////////////////////////////////////////////////////
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