lut.vhd

这是正玹实现代码,通过LUT来实现的!!!比其他要简单的多!还有方波,三角波的不同的VHDL程序实现.

library lpm;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity lut is
   port (addr:in std_logic_vector(5 downto 0);
        outdata:out std_logic_vector(7 downto 0);
        clk:in std_logic);
end lut;
architecture lut_arc of lut is
component lpm_rom
generic (LPM_WIDTH:natural;
         LPM_WIDTHAD:natural;
         LPM_NUMWORDS:natural:=0;
         LPM_ADDRESS_CONTROL:string:="REGISTERED";
         LPM_OUTDATA:string:="REGISTERED";
		 LPM_FILE:string; 
		 LPM_TYPE:string:="LPM_ROM";
		 LPM_HINT:string:="UNUSED");
     port (ADDRESS:in STD_LOGIC_VECTOR(LPM_WIDTHAD-1 downto 0);
	       INCLOCK:in STD_LOGIC:='0';
           OUTPUT:in STD_LOGIC:='0'; 
	       Q:out std_logic_vector(LPM_WIDTH-1 downto 0));
end component;
begin
  u1:lpm_rom
  generic map (8,6,0,"registered","unregistered","asin.mif","lpm_rom","unsed")
  port map (inclock=>clk,address=>addr,q=>outdata);
end lut_arc;