📄 adsuart.tan.summary
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Timing Analyzer Summary
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Type : Worst-case tsu
Slack : N/A
Required Time : None
Actual Time : 5.610 ns
From : rst
To : sld_signaltap:UART|trigger_in_reg
From Clock :
To Clock : clk
Failed Paths : 0
Type : Worst-case tco
Slack : N/A
Required Time : None
Actual Time : 14.173 ns
From : suart:iUART|u_xmit:iXMIT|state~23
To : txd
From Clock : clk
To Clock :
Failed Paths : 0
Type : Worst-case tpd
Slack : N/A
Required Time : None
Actual Time : 7.281 ns
From : clk1
To : AD_CLK
From Clock :
To Clock :
Failed Paths : 0
Type : Worst-case th
Slack : N/A
Required Time : None
Actual Time : 4.218 ns
From : altera_internal_jtag
To : sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9]
From Clock :
To Clock : altera_internal_jtag~TCKUTAP
Failed Paths : 0
Type : Worst-case Minimum tco
Slack : N/A
Required Time : None
Actual Time : 13.573 ns
From : suart:iUART|u_xmit:iXMIT|state~24
To : txd
From Clock : clk
To Clock :
Failed Paths : 0
Type : Worst-case Minimum tpd
Slack : N/A
Required Time : None
Actual Time : 2.124 ns
From : altera_internal_jtag~TDO
To : altera_reserved_tdo
From Clock :
To Clock :
Failed Paths : 0
Type : Clock Setup: 'clk'
Slack : N/A
Required Time : None
Actual Time : 67.70 MHz ( period = 14.772 ns )
From : adsram:iadc|LPMRAM:u1|altsyncram:altsyncram_component|altsyncram_ut01:auto_generated|altsyncram_hkb2:altsyncram1|ram_block3a2~porta_address_reg9
To : xdata[0]
From Clock : clk
To Clock : clk
Failed Paths : 0
Type : Clock Setup: 'altera_internal_jtag~TCKUTAP'
Slack : N/A
Required Time : None
Actual Time : 94.93 MHz ( period = 10.534 ns )
From : sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[4]
To : sld_hub:sld_hub_inst|HUB_TDO~reg0
From Clock : altera_internal_jtag~TCKUTAP
To Clock : altera_internal_jtag~TCKUTAP
Failed Paths : 0
Type : Clock Setup: 'clk1'
Slack : N/A
Required Time : None
Actual Time : 121.18 MHz ( period = 8.252 ns )
From : adsram:iadc|lpm_counter:addr_rtl_7|cntr_rb7:auto_generated|safe_q[2]
To : adsram:iadc|address[2]
From Clock : clk1
To Clock : clk1
Failed Paths : 0
Type : Clock Hold: 'clk1'
Slack : Not operational: Clock Skew > Data Delay
Required Time : None
Actual Time : N/A
From : adsram:iadc|address[9]
To : adsram:iadc|LPMRAM:u1|altsyncram:altsyncram_component|altsyncram_ut01:auto_generated|altsyncram_hkb2:altsyncram1|ram_block3a2~porta_address_reg9
From Clock : clk1
To Clock : clk1
Failed Paths : 30
Type : Clock Hold: 'clk'
Slack : Not operational: Clock Skew > Data Delay
Required Time : None
Actual Time : N/A
From : suart:iUART|u_xmit:iXMIT|xmit_cmd_p
To : suart:iUART|u_xmit:iXMIT|xmit_done
From Clock : clk
To Clock : clk
Failed Paths : 21
Type : Total number of failed paths
Slack :
Required Time :
Actual Time :
From :
To :
From Clock :
To Clock :
Failed Paths : 51
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