reserv.map.eqn

采用高速A/D的存储示波器设计

--D1L83 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~126
--operation mode is normal

D1L83 = AMPP_FUNCTION(D1L01, D1L73, HB6_Q[0], HB5_Q[0]);


--D1_jtag_debug_mode is sld_hub:sld_hub_inst|jtag_debug_mode
--operation mode is normal

D1_jtag_debug_mode = AMPP_FUNCTION(A1L51, D1L54, D1_jtag_debug_mode, D1L64, KB1_state[15], KB1_state[0]);


--D1L74 is sld_hub:sld_hub_inst|NODE_ENA~32
--operation mode is normal

D1L74 = AMPP_FUNCTION(HB6_Q[0], D1_jtag_debug_mode, HB5_Q[0]);


--KB1_state[4] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]
--operation mode is normal

KB1_state[4] = AMPP_FUNCTION(A1L51, KB1_state[4], KB1_state[3], KB1_state[7], A1L71, VCC);


--D1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1
--operation mode is normal

D1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L51, M5_dffs[0], M5_dffs[1], D1L35, D1L45, KB1_state[0], KB1_state[12]);


--HB1_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1]
--operation mode is normal

HB1_Q[1] = AMPP_FUNCTION(A1L51, HB3_Q[1], HB8_Q[1], HB5_Q[0], !D1L2, D1L83);


--D1L91 is sld_hub:sld_hub_inst|HUB_TDO~512
--operation mode is normal

D1L91 = AMPP_FUNCTION(HB1_Q[2], HB1_Q[1]);


--PB1L01 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~55
--operation mode is normal

PB1L01 = AMPP_FUNCTION(D1L74, KB1_state[4], D1_jtag_debug_mode_usr1, D1L91);


--HB1_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3]
--operation mode is normal

HB1_Q[3] = AMPP_FUNCTION(A1L51, HB3_Q[3], HB8_Q[3], HB5_Q[0], !D1L2, D1L83);


--PB1L43 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~44
--operation mode is normal

PB1L43 = AMPP_FUNCTION(RB1_safe_q[0], RB1_safe_q[2], RB1_safe_q[3]);


--PB1L9 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~3
--operation mode is normal

PB1L9 = AMPP_FUNCTION(HB1_Q[3], RB1_safe_q[1], PB1L43, HB1_Q[1]);


--PB1L11 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|process5~12
--operation mode is normal

PB1L11 = AMPP_FUNCTION(D1L74, HB1_Q[3], D1_jtag_debug_mode_usr1);


--PB1L31 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~911
--operation mode is normal

PB1L31 = AMPP_FUNCTION(QB1_safe_q[1], QB1_safe_q[0], KB1_state[4], PB1L11);


--HB1_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0]
--operation mode is normal

HB1_Q[0] = AMPP_FUNCTION(A1L51, HB3_Q[0], HB8_Q[0], HB5_Q[0], !D1L2, D1L83);


--PB1_ram_rom_incr_addr is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr
--operation mode is normal

PB1_ram_rom_incr_addr = AMPP_FUNCTION(PB1L33, PB1L43, HB1_Q[1], RB1_safe_q[1]);


--PB1L41 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~912
--operation mode is normal

PB1L41 = AMPP_FUNCTION(QB1_safe_q[2], QB1_safe_q[1], KB1_state[4], PB1L11);


--PB1L51 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~913
--operation mode is normal

PB1L51 = AMPP_FUNCTION(QB1_safe_q[3], QB1_safe_q[2], KB1_state[4], PB1L11);


--PB1L61 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~914
--operation mode is normal

PB1L61 = AMPP_FUNCTION(QB1_safe_q[4], QB1_safe_q[3], KB1_state[4], PB1L11);


--PB1L71 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~915
--operation mode is normal

PB1L71 = AMPP_FUNCTION(QB1_safe_q[5], QB1_safe_q[4], KB1_state[4], PB1L11);


--PB1L81 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~916
--operation mode is normal

PB1L81 = AMPP_FUNCTION(QB1_safe_q[6], QB1_safe_q[5], KB1_state[4], PB1L11);


--PB1L91 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~917
--operation mode is normal

PB1L91 = AMPP_FUNCTION(QB1_safe_q[7], QB1_safe_q[6], KB1_state[4], PB1L11);


--PB1L02 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~918
--operation mode is normal

PB1L02 = AMPP_FUNCTION(QB1_safe_q[8], QB1_safe_q[7], KB1_state[4], PB1L11);


--PB1L12 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~919
--operation mode is normal

PB1L12 = AMPP_FUNCTION(QB1_safe_q[9], QB1_safe_q[8], KB1_state[4], PB1L11);


--PB1L22 is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg~920
--operation mode is normal

PB1L22 = AMPP_FUNCTION(altera_internal_jtag, QB1_safe_q[9], KB1_state[4], PB1L11);


--D1L02 is sld_hub:sld_hub_inst|HUB_TDO~513
--operation mode is normal

D1L02 = AMPP_FUNCTION(PB1_ram_rom_data_reg[0], HB1_Q[2], HB1_Q[1], HB1_Q[0]);


--J3_WORD_SR[0] is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0]
--operation mode is normal

J3_WORD_SR[0] = AMPP_FUNCTION(A1L51, J3L01, J3L41, J3_WORD_SR[1], J3_word_counter[0], !J1_clear_signal, KB1_state[4], PB1L8);


--PB1_bypass_reg_out is DPRAM:u1|altsyncram:altsyncram_component|altsyncram_d071:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out
--operation mode is normal

PB1_bypass_reg_out = AMPP_FUNCTION(A1L51, altera_internal_jtag, !D1L2, D1L74);


--D1L12 is sld_hub:sld_hub_inst|HUB_TDO~514
--operation mode is normal

D1L12 = AMPP_FUNCTION(J3_WORD_SR[0], D1L91, PB1_bypass_reg_out, HB1_Q[0]);


--D1L22 is sld_hub:sld_hub_inst|HUB_TDO~515
--operation mode is normal

D1L22 = AMPP_FUNCTION(HB6_Q[0], D1L02, D1L12, D1_jtag_debug_mode_usr1);


--HB6_Q[1] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1]
--operation mode is normal

HB6_Q[1] = AMPP_FUNCTION(A1L51, HB8_Q[8], altera_internal_jtag, !D1L2, D1L53);


--C1_bypass_reg_out is sld_signaltap:rsv1|bypass_reg_out
--operation mode is normal

C1_bypass_reg_out = AMPP_FUNCTION(A1L51, altera_internal_jtag, !C1_reset_all, D1L84);


--HB2_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[3]
--operation mode is normal

HB2_Q[3] = AMPP_FUNCTION(A1L51, HB4_Q[3], HB8_Q[3], HB5_Q[0], !D1L2, D1L93);


--HB2_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[5]
--operation mode is normal

HB2_Q[5] = AMPP_FUNCTION(A1L51, HB4_Q[5], HB8_Q[5], HB5_Q[0], !D1L2, D1L93);


--HB2_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[4]
--operation mode is normal

HB2_Q[4] = AMPP_FUNCTION(A1L51, HB4_Q[4], HB8_Q[4], HB5_Q[0], !D1L2, D1L93);


--D1L31 is sld_hub:sld_hub_inst|HUB_TDO~497
--operation mode is normal

D1L31 = AMPP_FUNCTION(D1_jtag_debug_mode_usr1, HB2_Q[5], HB2_Q[4]);


--D1L41 is sld_hub:sld_hub_inst|HUB_TDO~498
--operation mode is normal

D1L41 = AMPP_FUNCTION(HB6_Q[1], C1_bypass_reg_out, HB2_Q[3], D1L31);


--J2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]
--operation mode is normal

J2_WORD_SR[0] = AMPP_FUNCTION(A1L51, J2L11, J2L31, J2_WORD_SR[1], J2_word_counter[4], !J1_clear_signal, KB1_state[4], D1L4);


--D1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG
--operation mode is normal

D1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L51, D1L21, VCC);


--LB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[0]
--operation mode is normal

LB1_dffe1a[0] = AMPP_FUNCTION(A1L51, D1L54, HB8_Q[2], HB8_Q[3], HB8_Q[1], !D1L2, D1L7);


--D1L32 is sld_hub:sld_hub_inst|HUB_TDO~516
--operation mode is normal

D1L32 = AMPP_FUNCTION(J2_WORD_SR[0], D1_HUB_BYPASS_REG, LB1_dffe1a[0]);


--D1L42 is sld_hub:sld_hub_inst|HUB_TDO~517
--operation mode is normal

D1L42 = AMPP_FUNCTION(D1L41, HB7_Q[0], D1L32, D1_jtag_debug_mode_usr1);


--M1_dffs[0] is sld_signaltap:rsv1|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]
--operation mode is normal

M1_dffs[0] = AMPP_FUNCTION(A1L51, M1_dffs[1], L1_is_max_write_address_ff, KB1_state[4], C1L03, !C1_reset_all);


--M3_dffs[0] is sld_signaltap:rsv1|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]
--operation mode is normal

M3_dffs[0] = AMPP_FUNCTION(A1L51, M3_dffs[1], !C1_reset_all, K1_trigger_setup_ena);


--D1L51 is sld_hub:sld_hub_inst|HUB_TDO~506
--operation mode is normal

D1L51 = AMPP_FUNCTION(HB2_Q[4], M1_dffs[0], HB2_Q[3], M3_dffs[0]);


--D1L61 is sld_hub:sld_hub_inst|HUB_TDO~507
--operation mode is normal

D1L61 = AMPP_FUNCTION(HB6_Q[1], D1_jtag_debug_mode_usr1, D1L51);


--HB8_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]